- Oct 14, 2024
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The NPU is based on the Vivante GC8000 and its power-domain is controlled my pgc_mlmix. Since the power-domain uses some of these clocks, setup the clock parent and rates inside the power-domain, and add the NPU node. The data sheet states the CLK_ML_AHB should be 300MHz for nominal, but 800MHz clock will divide down to 266 instead. Boards which operate in over-drive mode should update the clocks on their boards accordingly. When the driver loads, the NPU numerates as: etnaviv-gpu 38500000.npu: model: GC8000, revision: 8002 Signed-off-by:
Adam Ford <aford173@gmail.com> Reviewed-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Disable SH_EU clock gating for the VIPNano-Si+ NPU on i.MX8MP and for other affected core revisions. Taken from linux-imx lf-6.1.36-2.1.0, specifically [1]. [1] https://github.com/nxp-imx/linux-imx/blob/lf-6.1.36-2.1.0/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c#L2747-L2761 Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de>
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Turn the etnaviv_is_model_rev() macro into a static inline function. Use the raw model number as a parameter instead of the chipModel_GCxxxx defines. This reduces synchronization requirements for the generated headers. For newer hardware, the GCxxxx names are not the correct model names anyway. For example, model 0x8000 NPUs are called VIPNano-QI/SI(+) by VeriSilicon. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de>
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Update the state HI header from the rnndb commit 8d7ee714cfe2 ("Merge pull request #24 from pH5/unknown-3950"). Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de>
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This reverts commit 1dccdba0. In userspace a different approach was choosen - hwdb. As a result, there is no need for these values. Signed-off-by:
Christian Gmeiner <cgmeiner@igalia.com> Reviewed-by:
Tomeu Vizoso <tomeu@tomeuvizoso.net> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de>
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commit 4bce2442 ("drm/etnaviv: disable tx clock gating for GC7000 rev6203") accidentally applied the fix for i.MX8MN errata ERR050226 to GC2000 instead of GC7000, failing to disable tx clock gating for GC7000 rev 0x6023 as intended. Additional clean-up further propagated this issue, partially breaking the clock gating fixes added for GC7000 rev 6202 in commit 432f51e7 ("drm/etnaviv: add clock gating workaround for GC7000 r6202"). Signed-off-by:
Derek Foreman <derek.foreman@collabora.com> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de>
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The hwdb selection logic as a feature that allows it to mark some fields as 'don't care'. If we match with such a field we memcpy(..) the current etnaviv_chip_identity into ident. This step can overwrite some id values read from the GPU with the 'don't care' value. Fix this issue by restoring the affected values after the memcpy(..). As this is crucial for user space to know when this feature works as expected increment the minor version too. Fixes: 4078a118 ("drm/etnaviv: update hwdb selection logic") Cc: stable@vger.kernel.org Signed-off-by:
Christian Gmeiner <cgmeiner@igalia.com> Reviewed-by:
Tomeu Vizoso <tomeu@tomeuvizoso.net> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de>
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0x1540 is the address of 4th render target address pair (two pixel pipes). Signed-off-by:
Christian Gmeiner <cgmeiner@igalia.com> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de>
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Tomeu Vizoso authored
These ones will be needed to make use fo the NN and TP units in the NPUs based on Vivante IP. Also fix the number of NN cores in the VIPNano-qi. Signed-off-by:
Tomeu Vizoso <tomeu@tomeuvizoso.net> Acked-by:
Christian Gmeiner <cgmeiner@igalia.com> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de>
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Module level clock gating and the pulse eater might interfere with the GPU reset, as they both have the potential to stop the clock and thus reset propagation to parts of the GPU. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Christian Gmeiner <cgmeiner@igalia.com>
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Tomeu Vizoso authored
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- Oct 11, 2024
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Tomeu Vizoso authored
Import 6.4.11.p1.2 original version From NXP Linux release 6.1.22-2.0.0. [1] [1] https://github.com/nxp-imx/meta-imx/blob/mickledore-6.1.22-2.0.0/meta-bsp/recipes-kernel/kernel-modules/kernel-module-imx-gpu-viv_6.4.11.p1.2.bb
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Tomeu Vizoso authored
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Tomeu Vizoso authored
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Tomeu Vizoso authored
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Tomeu Vizoso authored
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Tomeu Vizoso authored
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- Sep 30, 2024
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Vitor Soares authored
On iMX8M Plus QuadLite (VPU-less SoC), the dependency between VPU power domains lead to a deferred probe error during boot: [ 17.140195] imx-pgc imx-pgc-domain.8: failed to command PGC [ 17.147183] platform imx-pgc-domain.11: deferred probe pending: (reason unknown) [ 17.147200] platform imx-pgc-domain.12: deferred probe pending: (reason unknown) [ 17.147207] platform imx-pgc-domain.13: deferred probe pending: (reason unknown) This is incorrect and should be the VPU blk-ctrl controlling these power domains, which is already doing it. After removing the `power-domain` property from the VPU PGC nodes, both iMX8M Plus w/ and w/out VPU boot correctly. However, it breaks the suspend/resume functionality. A fix for this is pending, see Links. Upstream-Status: Submitted [https://lore.kernel.org/all/20240701124302.16520-1-ivitro@gmail.com/] Cc: stable@vger.kernel.org Fixes: df680992 ("arm64: dts: imx8mp: add vpu pgc nodes") Link: https://lore.kernel.org/all/fcd6acc268b8642371cf289149b2b1c3e90c7f45.camel@pengutronix.de/ Link: https://lore.kernel.org/all/20240418155151.355133-1-ivitro@gmail.com/ Suggested-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Vitor Soares <vitor.soares@toradex.com>
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Vitor Soares authored
During the probe, the genpd power_dev is added to the dpm_list after blk_ctrl due to its parent/child relationship. Making the blk_ctrl suspend after and resume before the genpd power_dev. As a consequence, the system hangs when resuming the VPU due to the power domain dependency. To ensure the proper suspend/resume order, add a device link betweem blk_ctrl and genpd power_dev. It guarantees genpd power_dev is suspended after and resumed before blk-ctrl. Upstream-Status: Submitted [https://lore.kernel.org/all/20240418155151.355133-1-ivitro@gmail.com/] Cc: stable@vger.kernel.org Closes: https://lore.kernel.org/all/fccbb040330a706a4f7b34875db1d896a0bf81c8.camel@gmail.com/ Link: https://lore.kernel.org/all/20240409085802.290439-1-ivitro@gmail.com/ Fixes: 2684ac05 ("soc: imx: add i.MX8M blk-ctrl driver") Suggested-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Vitor Soares <vitor.soares@toradex.com>
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- Sep 25, 2024
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João Paulo Gonçalves authored
Add Toradex Verdin Ivy carrier board support. One notable feature of Ivy is the analog inputs. These inputs are multiplexed, allowing the same input to measure either voltage or current. For current measurements, a GPIO switch enables or disables the shunt resistor. This process is automatically managed by the Linux kernel using the IIO and MUX subsystems. Voltage measurement is always enabled, but the voltage measured by the ADC is scaled by a cascade voltage divider. In the device tree, the equivalent gain of the voltage divider is used, which can be calculated as follows: ------------ + | .-. R1=30K | | | | '-' |------------------- Analog Input (AIN) | | .-. .-. R2=10K | | R3=30K | | | | | | '-' '-' | | | |-------- | .-. + | R4=10K | | | | | ADC Input (Channels 0 and 1) | '-' - | | - -----------| |-------- === === GND GND Vin = Analog Input (AIN) Vout = ADC Input Rth = Thevenin Equiv. Resistance Vth = Thevenin Equiv. Voltage RL = Load Resistor R1 = 30K, R2 = 10K, R3 = 30K, R4 = 10K RL = R4 = 10K Rth = (R1 // R2) + R3 = 37500 Ohms Vth = (Vin * R2) / (R1 + R2) = Vin/4; Vout = (Vth * RL)/ (Rth + RL) = Vth/4.75 = Vin/19 Gain = Vout/Vin = 1/19 https://www.toradex.com/products/carrier-board/ivy-carrier-board Upstream-Status: Submitted [https://lore.kernel.org/lkml/20240924113048.125761-1-francesco@dolcini.it/ ] Signed-off-by:
João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com>
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João Paulo Gonçalves authored
Add a label to ti-ads1015 node to make it easier to reference it from other nodes. Upstream-Status: Submitted [https://lore.kernel.org/lkml/20240924113048.125761-1-francesco@dolcini.it/ ] Signed-off-by:
João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com>
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- Sep 24, 2024
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João Paulo Gonçalves authored
Add Toradex Verdin Ivy carrier board support. One notable feature of Ivy is the analog inputs. These inputs are multiplexed, allowing the same input to measure either voltage or current. For current measurements, a GPIO switch enables or disables the shunt resistor. This process is automatically managed by the Linux kernel using the IIO and MUX subsystems. Voltage measurement is always enabled, but the voltage measured by the ADC is scaled by a cascade voltage divider. In the device tree, the equivalent gain of the voltage divider is used, which can be calculated as follows: ------------ + | .-. R1=30K | | | | '-' |------------------- Analog Input (AIN) | | .-. .-. R2=10K | | R3=30K | | | | | | '-' '-' | | | |-------- | .-. + | R4=10K | | | | | ADC Input (Channels 0 and 1) | '-' - | | - -----------| |-------- === === GND GND Vin = Analog Input (AIN) Vout = ADC Input Rth = Thevenin Equiv. Resistance Vth = Thevenin Equiv. Voltage RL = Load Resistor R1 = 30K, R2 = 10K, R3 = 30K, R4 = 10K RL = R4 = 10K Rth = (R1 // R2) + R3 = 37500 Ohms Vth = (Vin * R2) / (R1 + R2) = Vin/4; Vout = (Vth * RL)/ (Rth + RL) = Vth/4.75 = Vin/19 Gain = Vout/Vin = 1/19 https://www.toradex.com/products/carrier-board/ivy-carrier-board Upstream-Status: Submitted [https://lore.kernel.org/lkml/20240924114053.127737-1-francesco@dolcini.it/ ] Signed-off-by:
João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com>
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João Paulo Gonçalves authored
Add labels to ti-ads1015 and fec ethernet mdio node to make it easier to reference them from other nodes. Upstream-Status: Submitted [https://lore.kernel.org/lkml/20240924114053.127737-1-francesco@dolcini.it/ ] Signed-off-by:
João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com>
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João Paulo Gonçalves authored
The condition for checking if triggers belong to the same IIO device to set attached_own_device is currently inverted, causing iio_trigger_using_own() to return an incorrect value. Fix it by testing for the correct return value of iio_validate_own_trigger(). Upstream-Status: Backport [74cb2157] Cc: stable@vger.kernel.org Fixes: 517985eb ("iio: trigger: Add simple trigger_validation helper") Signed-off-by:
João Paulo Gonçalves <joao.goncalves@toradex.com> Reviewed-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by:
Matti Vaittinen <mazziesaccount@gmail.com> Link: https://lore.kernel.org/r/20240614143658.3531097-1-jpaulo.silvagoncalves@gmail.com Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Mikko Rapeli authored
Commit 4d0c8d0a ("mmc: core: Use mrq.sbc in close-ended ffu") assigns prev_idata = idatas[i - 1], but doesn't check that the iterator i is greater than zero. Let's fix this by adding a check. Upstream-Status: Backport [cf55a7ac] Fixes: 4d0c8d0a ("mmc: core: Use mrq.sbc in close-ended ffu") Link: https://lore.kernel.org/all/20231129092535.3278-1-avri.altman@wdc.com/ Cc: stable@vger.kernel.org Signed-off-by:
Mikko Rapeli <mikko.rapeli@linaro.org> Reviewed-by:
Avri Altman <avri.altman@wdc.com> Tested-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240313133744.2405325-2-mikko.rapeli@linaro.org Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Emanuele Ghidoli authored
There are three methods to allocate memory for the GPU: - memory-region - contiguous_mem - system allocator The first reserves a fixed memory area for GPU, the second uses CMA, and the third one act as a fallback when the others are insufficient albeit with reduced performance. The current gpu memory-region falls into non-existent physical memory addresses on boards with less than 2 GB of memory. Additionally, reserving a memory-region on system with less of 2 GB reduces the overhall memory available. So, remove the memory-region usage and rely on contiguous_mem for GPU memory allocation. This commit is specific to downstream kernel using galcore driver instead of etnaviv driver. Upstream-Status: Inappropriate [Other] Signed-off-by:
Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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- Sep 20, 2024
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Parth Pancholi authored
This reverts commit 445ecaae. This change is no longer required on NXP downstream kernel v6.6-2.0.x-imx. This change breaks the native LVDS functionality with the aforementioned kernel version. Reverting this commit makes the native LVDS work on imx8mp with kernel v6.6-2.0.x-imx while the original issue of the deferral loop when native HDMI and the ldb bridge are enabled is not reproducible anymore. Most likey, below patch series [1] which is part of v6.6 downstream kernel related to fw_devlink may have solved the deferral loop issue for the mentioned scenario. [1]: https://lore.kernel.org/all/20240202095636.868578-1-saravanak@google.com/ Upstream-Status: Inappropriate [Other] Signed-off-by:
Parth Pancholi <parth.pancholi@toradex.com>
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- Sep 12, 2024
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Stefan Eichenberger authored
Setting the porch values for the Lontium LT8912B does not work properly. So we need a similar workaround as for the RM68200 and HX8394F until NXP fixes it by using some magic formula, see commit a8ac1d81bbed ("LF-4250 drm/bridge: nwl-dsi: Workaround RM68200 panel display shift issue") Unfortunately, the exact same workaround does not work. The applied workaround was found by trial and error. The only known non-working resolution is 640x480. This fix only applies to downstream kernel. The upstream kernel does not support the NXP i.MX8X MIPI DSI interface yet. A support request at NXP is pending: https://community.nxp.com/t5/i-MX-Graphics/i-MX8X-MIPI-DSI-Display-hsync-active-front-and-back-porch-issue/m-p/1737270 Upstream-Status: Inappropriate [other] Signed-off-by:
Stefan Eichenberger <stefan.eichenberger@toradex.com>
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- Sep 10, 2024
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Emanuele Ghidoli authored
The device tree defines the touchscreen controller, but it cannot be enabled because it lacks a reference label. This commit adds a label to allow it to be referenced and enabled. Upstream-Status: Submitted [https://lore.kernel.org/all/20240910152213.2072743-1-ghidoliemanuele@gmail.com/ ] Signed-off-by:
Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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- Sep 06, 2024
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Philippe Schenker authored
Add parallel RGB support. There is currently no support on mainline. Upstream-Status: Pending Signed-off-by:
Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by:
Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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Philippe Schenker authored
Add mipi dsi and csi I2C accessible on FFC X2 and X3 connectors. Nodes names are slightly different on upstream kernel and can be upstreamed with the proper modifications. Upstream-Status: Pending Signed-off-by:
Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by:
Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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- Sep 05, 2024
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Emanuele Ghidoli authored
Enable the new PHY required for PCIe. This was added in the nxp downstream kernel. There is currently no support for PCIe on mainline. Upstream-Status: Pending Signed-off-by:
Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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Stefan Eichenberger authored
Make sure that the wifi regulator is always on. The wifi driver itself puts the wifi module into suspend mode. If we cut the power the driver will crash when resuming from suspend. Wifi is not supported in the upstream kernel for Colibri iMX8X yet. Upstream-Status: Inappropriate [Other] Signed-off-by:
Stefan Eichenberger <stefan.eichenberger@toradex.com>
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Philippe Schenker authored
Bring back CMA in device tree and set its size to 416MiB for all Colibri iMX8X. The size is tuned to be enough to play full HD video using gst-play. This can and should be upstreamed. Upstream-Status: Pending Signed-off-by:
Philippe Schenker <philippe.schenker@toradex.com>
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Stefan Eichenberger authored
Replace gpio-hogs by using the hsio clock to enable the PCIe reference clock for Wifi and vcie-supply to power on the Wifi module. With this change the gpios will not be touched when Wifi is disabled. There is currently no support for PCIe on mainline. Upstream-Status: Pending Signed-off-by:
Stefan Eichenberger <stefan.eichenberger@toradex.com>
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Philippe Schenker authored
Add support for Wi-Fi that is connected to the SoC with PCIe. Make sure the clock is enabled with a GPIO Hog. Do also make sure the GPIO for power-down is high (power enabled). There is currently no support for PCIe on mainline. Upstream-Status: Pending Signed-off-by:
Philippe Schenker <philippe.schenker@toradex.com>
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Philippe Schenker authored
Add backlight to colibri-imx8x. Do copy the node from toradex_5.4-2.3.x-imx. This may be upstreamed if adma_pwm is supported. Upstream-Status: Pending Signed-off-by:
Philippe Schenker <philippe.schenker@toradex.com>
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Philippe Schenker authored
This commit adds mipi csi functionality. Copy the nodes from toradex_5.4-2.3.x-imx. Cross check changes in imx8x-mek.dtsi. Upstream does not yet support csi. Upstream-Status: Pending Signed-off-by:
Philippe Schenker <philippe.schenker@toradex.com>
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Philippe Schenker authored
Enable the GPU. This patch enables imx8_gpu_ss node which it is not present in mainline. Upstream-Status: Pending Signed-off-by:
Philippe Schenker <philippe.schenker@toradex.com>
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Andrejs Cainikovs authored
i.MX8, i.MX8X, i.MX8XP and i.MX8XL SOC device trees are all based on imx8-ss-*.dtsi files. For i.MX8X and i.MX8XP these device trees should be updated with some peripherals removed or updated, similar to i.MX8XL (imx8dxl-ss-*.dtsi files). However, it looks like only i.MX8 and i.MX8XL are up to date, but for i.MX8X and i.MX8XP some of the peripherals got inherited from imx8-ss-*.dtsi files, but in reality they are not present on SOC. As a result, during resource partition ownership check U-Boot receives messages from SCU firmware about these resources not owned by boot partition. In reality, these resources are not owned by anyone, as they simply does not exist, but are defined in Linux device tree. This change removes those peripherals, which are listed during U-Boot resource partition ownership check as warnings: ## Flattened Device Tree blob at 9d400000 Booting using the fdt blob at 0x9d400000 Loading Device Tree to 00000000fd652000, end 00000000fd67efff ... OK Disable clock-controller@585a0000 rsrc 411 not owned Disable clock-controller@5a4d0000 rsrc 62 not owned Starting kernel ... The issue is not present in upstream since these nodes are not present there, only downstream is affected. Upstream-Status: Inappropriate [other] Signed-off-by:
Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
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