- Jun 08, 2022
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Masahiro Yamada authored
EXPORT_SYMBOL and __init is a bad combination because the .init.text section is freed up after the initialization. Hence, modules cannot use symbols annotated __init. The access to a freed symbol may end up with kernel panic. modpost used to detect it, but it has been broken for a decade. Recently, I fixed modpost so it started to warn it again, then this showed up in linux-next builds. There are two ways to fix it: - Remove __init - Remove EXPORT_SYMBOL I chose the latter for this case because the only in-tree call-site, arch/x86/kernel/cpu/mshyperv.c is never compiled as modular. (CONFIG_HYPERVISOR_GUEST is boolean) Fixes: dd2cb348 ("clocksource/drivers: Continue making Hyper-V clocksource ISA agnostic") Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
Masahiro Yamada <masahiroy@kernel.org> Reviewed-by:
Vitaly Kuznetsov <vkuznets@redhat.com> Reviewed-by:
Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20220606050238.4162200-1-masahiroy@kernel.org Signed-off-by:
Wei Liu <wei.liu@kernel.org>
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- May 24, 2022
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Krzysztof Kozlowski authored
The irq_of_parse_and_map() returns 0 on failure, not a negative ERRNO. Fixes: 89355274 ("clocksource/drivers/oxnas-rps: Add Oxford Semiconductor RPS Dual Timer") Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220422104101.55754-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
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Dan Carpenter authored
The "pdata" pointer cannot be NULL because it's checked at the start of the function. Delete the check. Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YoZM65RFDQAfqV6J@kili Signed-off-by:
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- May 18, 2022
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Nick Hawkins authored
Add support for the HPE GXP SOC timer. The GXP supports several different kinds of timers but for the purpose of this driver there is only support for the General Timer. The timer has a 1us resolution and is 32 bits. The timer also creates a child watchdog device as the register region is the same. Signed-off-by:
Nick Hawkins <nick.hawkins@hpe.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Thomas Gleixner authored
The license information clearly states GPL version 2 only. The extra text which excludes warranties is an excerpt of the corresponding GPLv2 clause 11. So the SPDX identifier covers it completely. Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Samuel Holland <samuel@sholland.org> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: linux-sunxi@lists.linux.dev Link: https://lore.kernel.org/r/20220510171254.970933294@linutronix.de Signed-off-by:
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Thomas Gleixner authored
The license information clearly states GPL version 2 only. The extra text which excludes warranties is an excerpt of the corresponding GPLv2 clause 11. So the SPDX identifier covers it completely. Signed-off-by:
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Thomas Gleixner authored
The licensing text references explicitely the COPYING file in the kernel base directory, which is clearly GPL version 2 only. Signed-off-by:
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Thomas Gleixner authored
The license information clearly states GPL version 2 only. The extra text which excludes warranties is an excerpt of the corresponding GPLv2 clause 11. So the SPDX identifier covers it completely. Signed-off-by:
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Thomas Gleixner authored
The license information clearly states GPL version 2 only. The extra text which excludes warranties is an excerpt of the corresponding GPLv2 clause 11. So the SPDX identifier covers it completely. Signed-off-by:
Vladimir Zapolskiy <vz@mleia.com> Link: https://lore.kernel.org/r/20220510171254.717233312@linutronix.de Signed-off-by:
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Thomas Gleixner authored
The license information clearly states GPL version 2 only. The extra text which excludes warranties is an excerpt of the corresponding GPLv2 clause 11. So the SPDX identifier covers it completely. Signed-off-by:
Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/20220510171254.655035023@linutronix.de Signed-off-by:
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Thomas Gleixner authored
The license information clearly states GPL version 2 only. The extra text which excludes warranties is an excerpt of the corresponding GPLv2 clause 11. So the SPDX identifier covers it completely. Signed-off-by:
Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20220510171254.592781786@linutronix.de Signed-off-by:
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Thomas Gleixner authored
The licensing text references explicitely the COPYING file in the kernel base directory, which is clearly GPL version 2 only. Signed-off-by:
Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20220510171254.529249404@linutronix.de Signed-off-by:
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Thomas Gleixner authored
The licensing text references explicitely the COPYING file in the kernel base directory, which is clearly GPL version 2 only. Signed-off-by:
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Thomas Gleixner authored
The license information clearly states GPL version 2 only. The extra text which excludes warranties is a transcript of the corresponding GPLv2 clause 11, which is explicitely referenced for details. So the SPDX identifier covers it completely. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220510171254.404209482@linutronix.de Signed-off-by:
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Andre Przywara authored
When a machine sports more than one SP804 timer instance, we only bring up the first one, since multiple timers of the same kind are not useful to Linux. As this is intentional behaviour, we should not return an error message, as we do today: =============== [ 0.000800] Failed to initialize '/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/timer@120000': -22 =============== Replace the -EINVAL return with a debug message and return 0 instead. Also we do not reach the init function anymore if the DT node is disabled (as this is now handled by OF_DECLARE), so remove the explicit check for that case. This fixes a long standing bogus error when booting ARM's fastmodels. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Reviewed-by:
Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20220506162522.3675399-1-andre.przywara@arm.com Signed-off-by:
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Samuel Holland authored
Some implementations of the SBI time extension depend on hart-local state (for example, CSRs) that are lost or hardware that is powered down when a CPU is suspended. To be safe, the clockevents driver cannot assume that timer IRQs will be received during CPU suspend. Fixes: 62b01943 ("clocksource: new RISC-V SBI timer driver") Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20220509012121.40031-1-samuel@sholland.org Signed-off-by:
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Linus Walleij authoredThe boardfiles for IXP4xx have been deleted. Delete all the quirks and code dealing with that boot path and rely solely on device tree boot. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220406205505.2332821-1-linus.walleij@linaro.org Signed-off-by:
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- Apr 21, 2022
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Arnd Bergmann authored
As a preparation for future omap1 multiplatform support, stop using mach/hardware.h and instead include the omap1-io.h for low-level register access to MOD_CONF_CTRL_1. Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
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- Apr 11, 2022
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Add a clocksource based on the goldfish-rtc device. Move the timer register definition to <clocksource/timer-goldfish.h> This kernel implementation is based on the QEMU upstream implementation: https://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/rtc/goldfish_rtc.c goldfish-timer is a high-precision signed 64-bit nanosecond timer. It is part of the 'goldfish' virtual hardware platform used to run some emulated Android systems under QEMU. This timer only supports oneshot event. Signed-off-by:
Laurent Vivier <laurent@vivier.eu> Acked-by:
Geert Uytterhoeven <geert@linux-m68k.org>
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- Mar 18, 2022
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Randy Dunlap authored
__setup() handlers should return 1 to obsolete_checksetup() in init/main.c to indicate that the boot option has been handled. A return of 0 causes the boot option/value to be listed as an Unknown kernel parameter and added to init's (limited) environment strings. The __setup() handler interface isn't meant to handle negative return values -- they are non-zero, so they mean "handled" (like a return value of 1 does), but that's just a quirk. So return 1 from parse_pmtmr(). Also print a warning message if kstrtouint() returns an error. Fixes: 6b148507 ("pmtmr: allow command line override of ioport") Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Reported-by:
Igor Zhbanov <i.zhbanov@omprussia.ru> Link: lore.kernel.org/r/64644a2f-4a20-bab3-1e15-3b2cdd0defe3@omprussia.ru Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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- Mar 07, 2022
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Guillaume Ranquet authored
of_base->base can either be iomapped using of_io_request_and_map() or of_iomap() depending whether or not an of_base->name has been set. Thus check of_base->base against NULL as of_iomap() does not return a PTR_ERR() in case of error. Fixes: 9aea417a ("clocksource/drivers/timer-of: Don't request the resource by name") Signed-off-by:
Guillaume Ranquet <granquet@baylibre.com> Link: https://lore.kernel.org/r/20220307172656.4836-1-granquet@baylibre.com Signed-off-by:
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Claudiu Beznea authored
Use 5MHz clock for clockevent timers. This increases timer's resolution. Signed-off-by:
Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220304133601.2404086-4-claudiu.beznea@microchip.com Signed-off-by:
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Claudiu Beznea authored
Use notrace for mchp_pit64b_sched_read_clk() to avoid recursive call of prepare_ftrace_return() when issuing: echo function_graph > /sys/kernel/debug/tracing/current_tracer Fixes: 625022a5 ("clocksource/drivers/timer-microchip-pit64b: Add Microchip PIT64B support") Signed-off-by:
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Claudiu Beznea authored
PIT64B timer driver doesn't depend on CLKSRC_MMIO since commit e85c1d21 ("clocksource/drivers/timer-microchip-pit64b: Add clocksource suspend/resume"). Remove the selection. Signed-off-by:
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Nathan Chancellor authored
When building this driver for an architecture other than ARCH=arm: drivers/clocksource/timer-imx-tpm.c:78:20: error: unused function 'tpm_read_sched_clock' [-Werror,-Wunused-function] static u64 notrace tpm_read_sched_clock(void) ^ 1 error generated. Move the function definition under the existing CONFIG_ARM section so there is no more warning. Fixes: 10720e12 ("clocksource/drivers/imx-tpm: Exclude sched clock for ARM64") Signed-off-by:Nathan Chancellor <nathan@kernel.org> Reviewed-by:
Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220303184212.2356245-1-nathan@kernel.org Signed-off-by:
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Marc Zyngier authored
With FEAT_ECV and the 1GHz counter, it is pretty likely that the event stream divider doesn't fit in the field that holds the divider value (we only have 4 bits to describe counter bits [15:0] Thankfully, FEAT_ECV also provides a scaling mechanism to switch the field to cover counter bits [23:8] instead. Enable this on arm64 when ECV is available (32bit doesn't have any detection infrastructure and is unlikely to be run on an ARMv8.6 system anyway). Signed-off-by:
Marc Zyngier <maz@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by:
Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20220203170502.2694422-1-maz@kernel.org Signed-off-by:
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Alim Akhtar authored
Variable _name_ hold mct_tick number per cpu and it is currently limited to 10. Which restrict the scalability of the MCT driver for the SoC which has more local timers interrupts (>= 12). Increase the length of it to make mct_tick printed correctly for each local timer interrupts per CPU. Signed-off-by:
Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220221174547.26176-3-alim.akhtar@samsung.com Signed-off-by:
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Alim Akhtar authored
Bump-up maximum number of MCT IRQ to match the binding documentation. This make driver scalable for SoC which has more than 12 timer irqs, like recently added FSD SoC. Reviewed-by:
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Alim Akhtar authored
MCT driver define an enum which list global and local timer's irq index. Most of them are not used but MCT_G0_IRQ and MCT_L0_IRQ and these two are at a fixed offset/index. Get rid of this enum and use a #define for the used irq index. No functional changes expected. Reviewed-by:
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Krzysztof Kozlowski authored
The driver statically defines maximum number of interrupts it can handle, however it does not respect that limit when configuring them. When provided with a DTS with more interrupts than assumed, the driver will overwrite static array mct_irqs leading to silent memory corruption. Validate the interrupts coming from DTS to avoid this. This does not change the fact that such DTS might not boot at all, because it is simply incompatible, however at least some warning will be printed. Fixes: 36ba5d52 ("ARM: EXYNOS: add device tree support for MCT controller driver") Signed-off-by:
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Drew Fustini authored
The existing fix for errata i940 causes a conflict for IPU2 which is using timer 3 and 4. From arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi: &ipu2 { mboxes = <&mailbox6 &mbox_ipu2_ipc3x>; ti,timers = <&timer3>; ti,watchdog-timers = <&timer4>, <&timer9>; }; The conflict was noticed when booting mainline on the BeagleBoard X15 which has a TI AM5728 SoC: remoteproc remoteproc1: 55020000.ipu is available remoteproc remoteproc1: powering up 55020000.ipu remoteproc remoteproc1: Booting fw image dra7-ipu2-fw.xem4 omap-rproc 55020000.ipu: could not get timer platform device omap-rproc 55020000.ipu: omap_rproc_enable_timers failed: -19 remoteproc remoteproc1: can't start rproc 55020000.ipu: -19 This change modifies the errata fix to instead use timer 15 and 16 which resolves the timer conflict. It does not appear to introduce any latency regression. Results from cyclictest with original errata fix using dmtimer 3 and 4: # cyclictest --mlockall --smp --priority=80 --interval=200 --distance=0 policy: fifo: loadavg: 0.02 0.03 0.05 T: 0 ( 1449) P:80 I:200 C: 800368 Min: 0 Act: 32 Avg: 22 Max: 128 T: 1 ( 1450) P:80 I:200 C: 800301 Min: 0 Act: 12 Avg: 23 Max: 70 The results after the change to dmtimer 15 and 16: # cyclictest --mlockall --smp --priority=80 --interval=200 --distance=0 policy: fifo: loadavg: 0.36 0.19 0.07 T: 0 ( 1711) P:80 I:200 C: 759599 Min: 0 Act: 6 Avg: 22 Max: 108 T: 1 ( 1712) P:80 I:200 C: 759539 Min: 0 Act: 19 Avg: 23 Max: 79 Fixes: 25de4ce5 ("clocksource/drivers/timer-ti-dm: Handle dra7 timer wrap errata i940") Link: https://lore.kernel.org/linux-omap/YfWsG0p6to3IJuvE@x1/ Suggested-by:Suman Anna <s-anna@ti.com> Reviewed-by:
Drew Fustini <dfustini@baylibre.com> Link: https://lore.kernel.org/r/20220204053503.1409162-1-dfustini@baylibre.com Signed-off-by:
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Alan Kao authored
The nds32 architecture, also known as AndeStar V3, is a custom 32-bit RISC target designed by Andes Technologies. Support was added to the kernel in 2016 as the replacement RISC-V based V5 processors were already announced, and maintained by (current or former) Andes employees. As explained by Alan Kao, new customers are now all using RISC-V, and all known nds32 users are already on longterm stable kernels provided by Andes, with no development work going into mainline support any more. While the port is still in a reasonably good shape, it only gets worse over time without active maintainers, so it seems best to remove it before it becomes unusable. As always, if it turns out that there are mainline users after all, and they volunteer to maintain the port in the future, the removal can be reverted. Link: https://lore.kernel.org/linux-mm/YhdWNLUhk+x9RAzU@yamatobi.andestech.com/ Link: https://lore.kernel.org/lkml/20220302065213.82702-1-alankao@andestech.com/ Link: https://www.andestech.com/en/products-solutions/andestar-architecture/ Signed-off-by:
Alan Kao <alankao@andestech.com> [arnd: rewrite changelog to provide more background] Signed-off-by:
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- Feb 23, 2022
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Christoph Hellwig authored
Signed-off-by:Christoph Hellwig <hch@lst.de>
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- Feb 18, 2022
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Devkit8000 board seems to always used 32k_counter as clocksource. Restore this behavior. If clocksource is back to 32k_counter, timer12 is now the clockevent source (as before) and timer2 is not longer needed here. This commit fixes the same issue observed with commit 23885389 ("ARM: dts: Fix timer regression for beagleboard revision c") when sleep is blocked until hitting keys over serial console. Fixes: aba1ad05 ("clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support") Fixes: e428e250 ("ARM: dts: Configure system timers for omap3") Signed-off-by:
Anthoine Bourgeois <anthoine.bourgeois@gmail.com> Signed-off-by:
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- Feb 16, 2022
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Peng Fan authored
For ARM64 platform such as i.MX8ULP which has ARMv8 generic timer as sched clock, which is much faster compared with tpm sched clock. Reading the tpm count register in i.MX8ULP requires about 290ns, this is slow and introduce scheduler latency. So exclude tpm sched clock for ARM64 platform. Signed-off-by:
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- Jan 26, 2022
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Peng Fan authored
The tpm driver is not only for i.MX7ULP now, i.MX8ULP also use it. It maybe also used by other i.MX variants, so update name to reflect it. Signed-off-by:
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Peng Fan authored
Add CLOCK_EVT_FEAT_DYNIRQ to allow the IRQ could be runtime set affinity to the cores that needs wake up, otherwise saying core0 has to send IPI to wakeup core1. With CLOCK_EVT_FEAT_DYNIRQ set, when broadcast timer could wake up the cores, IPI is not needed. Acked-by:
Jacky Bai <ping.bai@nxp.com> Signed-off-by:
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Peng Fan authored
counter_width and timer_base will not be updated after init, so mark as __ro_after_init. Signed-off-by:
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Peng Fan authored
Per the Documentation, IRQF_IRQPOLL is used for polling (only the interrupt that is registered first in a shared interrupt is considered for performance reasons) The TPM timer is not sharing interrupt with others, and pass irqpoll not make sense for i.MX platform. Signed-off-by:
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Peng Fan authored
Per the Documentation, IRQF_IRQPOLL is used for polling (only the interrupt that is registered first in a shared interrupt is considered for performance reasons) But this timer is not sharing interrupt line with others, and actually irqpoll not work with this timer with IRQF_IRQPOLL set, so drop the flag. Signed-off-by:
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