- Aug 15, 2017
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Tom Rini authored
Signed-off-by: Tom Rini <trini@konsulko.com>
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Tom Rini authored
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
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- Aug 14, 2017
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git://git.denx.de/u-boot-netTom Rini authored
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Sam Protsenko authored
Also introduce CONFIG_USE_BOOTARGS option so we can control if CONFIG_BOOTARGS defined at all. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> [trini: Resync r8a779[56]_ulcb, various ls10xx targets] Signed-off-by: Tom Rini <trini@konsulko.com>
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Prabhakar Kushwaha authored
Even after memory free of phydev, priv is still pointing to the obsolete address. So update priv->phydev as NULL after memory free. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Yuiko Oshino authored
Add support for Microchip LAN7500, LAN7800 and LAN7850, USB to 10/100/1000 Ethernet Controllers. Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Yuiko Oshino authored
Add an mii helper function to resolve flow control status per IEEE 802.3-2005 table 28B-3. This function was taken from the Linux source tree. Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Madalin Bucur authored
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Tom Rini authored
While it is likely that this entire case is superfluous and can be removed, correct the test now to match what is in rockchip-common.h and makes sense based on context of the code. Otherwise we get a large number of warnings. Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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- Aug 13, 2017
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Patrice Chotard authored
A few years ago STM32F1 SoCs support has been added : 0144caf2 gpio: stm32: add stm32f1 support 2d18ef23 ARMv7M: add STM32F1 support But neither STM32F1 dedicated defconfig nor board was associated to these commits. Got confirmation from Tom Rini and Matt Porter to remove all this code [1] [1] http://u-boot.10912.n7.nabble.com/Remove-STM32F1-support-td301603.html Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Chris Packham authored
This appears to be a simple typo that dates back to the original implementation of board_detail in commit e7939464 ("common: Update cmd_bdinfo for PPC"). Signed-off-by: Chris Packham <judge.packham@gmail.com>
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Simon Glass authored
Move this test so that it will run when 'make tests' is used. Signed-off-by: Simon Glass <sjg@chromium.org>
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Simon Glass authored
Convert this test to use the pytest framework. Signed-off-by: Simon Glass <sjg@chromium.org>
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Simon Glass authored
We plan to rewrite this script to use the pytest framework. To make it easier to review the changes, indent the code to match the next patch. This gets all of the whitespace changes out of the way. Signed-off-by: Simon Glass <sjg@chromium.org>
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Nishanth Menon authored
OMAP5432 did go into production with AVS class0 registers which were mutually exclusive from AVS Class 1.5 registers. Most OMAP5-uEVM boards use the pre-production Class1.5 which has production efuse registers set to 0. However on production devices, these are set to valid data. scale_vcore logic is already smart enough to detect this and use the "Nominal voltage" on devices that do not have efuse registers populated. On a test production device populated as follows: MPU OPP_NOM: => md.l 0x04A0021C4 1 4a0021c4: 03a003e9 .... (0x3e9 = 1.01v) vs nom voltage of 1.06v MPU OPP_HIGH: => md.l 0x04A0021C8 1 4a0021c8: 03400485 ..@. MM OPP_NOM: => md.l 0x04A0021A4 1 4a0021a4: 038003d4 .... (0x3d4 = 980mV) vs nom voltage of 1.025v MM OPP_OD: => md.l 0x04A0021A8 1 4a0021a8: 03600403 ..`. CORE OPP_NOM: => md.l 0x04A0021D8 1 4a0021d8: 000003cf .... (0x3cf = 975mV) vs nom voltage of 1.040v Since the efuse values are'nt currently used, we do not regress on existing pre-production samples (they continue to use nominal voltage). But on boards that do have production samples populated, we can leverage the optimal voltages necessary for proper operation. Tested on: a) 720-2644-001 OMAP5UEVM with production sample. b) 750-2628-222(A) UEVM5432G-02 with pre-production sample. Data based on OMAP5432 Technical reference Manual SWPU282AF (May 2012-Revised Aug 2016) NOTE: All collaterals on OMAP5432 silicon itself seems to have been removed from ti.com, though EVM details are still available: http://www.ti.com/tool/OMAP5432-EVM Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
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Nishanth Menon authored
ES2.0 descopes OPP_LOW definition. So remove it from macros defined. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
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Simon Glass authored
A recent change adjusted a test string so that the test no-longer passes. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Heiko Schocher <hs@denx.de> Fixes: b28c5fcc (test-fit.py: Minor grammar/spelling/clarification tweaks)
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Andy Shevchenko authored
Convert name to show explicitly that we are using milliseconds. For a watchdog timer this is precise enough. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Nobuhiro Iwamatsu authored
FDT_ERROR is defined as unsigned long. However, since the return value of fdt_offset() is int, a warning will occur when compiling. Also, it is better to use -EINVAL than FDT_ERROR. This fixes this problem by change return value from FDT_ERROR to -EINVAL. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Franklin S Cooper Jr <fcooper@ti.com>
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Bin Meng authored
QEMU supports NVMe emulation. Enable the NVMe driver on QEMU x86. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Bin Meng authored
Maximum Data Transfer Size (MDTS) field indicates the maximum data transfer size between the host and the controller. The host should not submit a command that exceeds this transfer size. The value is in units of the minimum memory page size and is reported as a power of two (2^n). The spec also says: a value of 0h indicates no restrictions on transfer size. On the real NVMe card this is normally not 0 due to hardware restrictions, but with QEMU emulated NVMe device it reports as 0. In nvme_blk_read/write() below we have the following algorithm for maximum number of logic blocks per transfer: u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift); dev->max_transfer_shift being 0 will for sure cause lbas to overflow. Let's use 20. With this fix, the NVMe driver works on QEMU emulated NVMe device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Jon Nettleton authored
NVMe should use the nsze value from the queried device. This will reflect the total number of blocks of the device and fix detecting my Samsung 960 EVO 256GB. Original: Capacity: 40386.6 MB = 39.4 GB (82711872 x 512) Fixed: Capacity: 238475.1 MB = 232.8 GB (488397168 x 512) Signed-off-by: Jon Nettleton <jon@solid-run.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Jon Nettleton authored
This adds support to detect the catchall PCI class for NVMe devices. It allows the drivers to work with most NVMe devices that don't need specific detection due to quirks etc. Tested against a Samsung 960 EVO drive. Signed-off-by: Jon Nettleton <jon@solid-run.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Zhikang Zhang authored
Add nvme commands in U-Boot command line. 1. "nvme scan" - scan NVMe blk devices 2. "nvme list" - show all available NVMe blk devices 3. "nvme info" - show current or a specific NVMe blk device 4. "nvme device" - show or set current device 5. "nvme part" - print partition table 6. "nvme read" - read data from NVMe blk device 7. "nvme write" - write data to NVMe blk device Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Zhikang Zhang authored
This adds nvme_print_info() to show detailed NVMe controller and namespace information. Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Zhikang Zhang authored
NVM Express (NVMe) is a register level interface that allows host software to communicate with a non-volatile memory subsystem. This interface is optimized for enterprise and client solid state drives, typically attached to the PCI express interface. This adds a U-Boot driver support of devices that follow the NVMe standard [1] and supports basic read/write operations. Tested with a 400GB Intel SSD 750 series NVMe card with controller id 8086:0953. [1] http://www.nvmexpress.org/resources/specifications/ Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Zhikang Zhang authored
This adds a new uclass id and block interface type for NVMe. Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com> Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jon Nettleton <jon@solid-run.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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Heinrich Schuchardt authored
Remove superfluous self assignements. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
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Heinrich Schuchardt authored
Assigning dev_num to itself is superfluous. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
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Heinrich Schuchardt authored
va_start must always be matched by va_end. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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Heinrich Schuchardt authored
If CONFIG_MMC_DW is not defined the return value of init_dwmmc should not rely on a random stack value. Instead indicate that no error occured. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
The if in the else branch is superfluous. We can use a simple if. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
It does not make sense to check if info is NULL after dereferencing it. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
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Heinrich Schuchardt authored
For DEVICE_NON_SHARED the newly assigned value of attr is overwritten due to a missing break. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
It does not make sense first to dereference c and then to check if it is NULL. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
It does not make sense first to dereference c and then to check if it is NULL. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
It does not make sense to first dereference c and then check if it is NULL. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
If the NOR device is not available do not return a random value from the stack. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
No need to assign a value to sig if the next statement using sig is itself an assignment of a value to sig. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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