- Jul 15, 2008
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Wolfgang Denk authored
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Hugo Villeneuve authored
Round the serial port clock divisor value returned by calc_divisor() Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
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Robin Getz authored
on the network with it's offered IP number; it should not reply until after it has received a DHCP ACK message. Also ensures that U-Boot does it's DHCPREQUEST as broadcast (per RFC 2131). Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Acked-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
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Sebastian Siewior authored
This got changed by commit 93c56f21 [cfi_flash: support of long cmd in U-boot.] Long is the wrong type because it will behave differently on 64bit machines in a way that is probably not expected. u32 should be enough. Cc: Alexey Korolev <akorolev@infradead.org> Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru> Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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git://git.denx.de/u-boot-shWolfgang Denk authored
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Andre Schwarz authored
The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet controller (using e1000) and custom Altera Cyclone-II FPGA on PCI. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Timur Tabi authored
Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats. The NXID format replaces the older CCID format, but it's important to support both since most boards out there still use the CCID format. This change is in preparation for using one file to handle both formats. This will also unify EEPROM support for all Freescale 85xx and 86xx boards. Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR instead of ID_EEPROM_ADDR. Signed-off-by: Timur Tabi <timur@freescale.com>
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Nobuhiro Iwamatsu authored
Add function of new PCI, pci_skip_dev and pci_print_dev. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Andy Fleming authored
The L2_INIT_RAM option was unused, and recent changes to the TLB code meant that the INIT_RAM TLBs weren't being cleared out. In order to reduce the amount of mapped space attached to nothing, we change things so the TLBs get cleared. Signed-off-by: Andy Fleming <afleming@freescale.com>
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Andy Fleming authored
The fake flash bank was generating errors for anyone who didn't have a PromJET hooked up to the board. As that constitutes the vast majority of users, we remove it. Signed-off-by: Andy Fleming <afleming@freescale.com>
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Kumar Gala authored
Add support for using a PCIe ATI Video card on PCIe2. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Add new L1/L2 SPRs related to e500mc cache config and control. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
The L2 size detection code was a bit confusing and we kept having to add code to it to handle new processors. Change the sense of detection so we look for the older processors that aren't changing. Also added support for 1M cache size on 8572. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Paul Gortmaker authored
Make the default build for the sbc8560 board be powerpc capable with libfdt support. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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Andy Fleming authored
This was proposed by Paul Gortmaker in response to Wolfgang's comments on similar #defines in sbc8560.h. Signed-off-by: Andy Fleming <afleming@freescale.com>
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Paul Gortmaker authored
Add in the default fdt settings and the typical EXTRA_ENV settings as borrowed from the mpc8560ads. Fix a couple of stale references to the mpc8560ads dating back to the original clone/fork. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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Paul Gortmaker authored
Add in for the sbc8560, the ft_board_setup() routine, based on what is in use for the Freescale MPC8560ADS board. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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Paul Gortmaker authored
The existing config doesn't define CONFIG_HAS_ETH0, and so the fdt support doesn't update the zeros in the dtb local-mac with real data from the u-boot env. Since the existing config is tailored to just two interfaces, get rid of the ETH2 definitions at the same time. Also don't include any end user specific data into the environment by default -- things like MAC address, network parameters etc. need to come from the end user. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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Paul Gortmaker authored
The sbc8560 board ships with 512MB of memory installed, but the current cs0_bnds is hard coded for 256MB. Set the value based on CFG_SDRAM_SIZE. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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Paul Gortmaker authored
The definitions for the TSEC have become out of date. There is no longer any such options like "CONFIG_MPC85xx_TSEC1" or similar. Update to match those of other boards, like the MPC8560ADS. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
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- Jul 14, 2008
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Paul Gortmaker authored
Some boards that have external 16550 UARTs don't have a direct tie between bi_busfreq and the clock used for the UARTs. Boards that do have such a tie should set CFG_NS16550_CLK to be get_bus_freq(0) -- which most of them do already. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
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Andrew Klossner authored
With a page size of BOOKE_PAGESZ_16M, both the real and effective addresses must be multiples of 16MB. The hardware silently truncates them so the code happens to work. This patch clarifies the situation by establishing addresses that the hardware doesn't need to truncate. Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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Kim Phillips authored
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Kim Phillips authored
Delete the crypto node if not on an E-processor. If on 8360 or 834x family, check rev and up-rev crypto node (to SEC rev. 2.4 property values) if on an 'EA' processor, e.g. MPC8349EA. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Hugo Villeneuve authored
ARM DaVinci: Remove extern phy_t declaration by moving code to proper place. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
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Hugo Villeneuve authored
ARM DaVinci: Remove duplicate definitions of MACH_TYPE and prototype of i2c_init(). Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
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Kumar Gala authored
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Wolfgang Denk authored
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Andy Fleming authored
The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping space for some anyway, we were allowing speculative loads into unmapped space, which would cause an exception (annoying, even if ultimately harmless). Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the problem. Signed-off-by: Andy Fleming <afleming@freescale.com>
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Wolfgang Denk authored
Signed-off-by: Wolfgang Denk <wd@denx.de>
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