Skip to content
Snippets Groups Projects
  1. Apr 16, 2009
  2. Apr 15, 2009
  3. Apr 13, 2009
  4. Apr 10, 2009
  5. Apr 08, 2009
    • Jesse Barnes's avatar
      Don't enable kernel execbuf fencing w/EXA · ec8ef3b2
      Jesse Barnes authored and Carl Worth's avatar Carl Worth committed
      If we enable kernel execbuf fence register management, it's best if the
      kernel manages all fence registers.  This works fine if the accel
      method is managing pixmaps or doesn't use offscreen pixmaps.  However
      with EXA, pixmap accesses are done relative to the framebuffer BAR
      mapping (pI830->FbBase) and the Screen pixmap address.  So if we try to
      set the screen pixmap to point at a GTT mapped (and therefore properly
      fenced) address, later calls to intel_get_pixmap_offset() will call
      into EXA, which will use the pseudo-random pixmap addr and the EXA
      offscreen base addr (which is really just FbBase) to calculate the
      offset.  This will fail.  So disable kernel fence reg management in the
      EXA case (this is easier than adding proper EXA pixmap management to
      xf86-video-intel, and makes more sense since we'll be removing EXA soon
      anyway).
      
      Fixes FDO #21027.
      
      Also happens to fix FDO #21029 (as tested by Carl Worth <cworth@cworth.org).
      (cherry picked from commit 620e97bb)
      ec8ef3b2
  6. Apr 07, 2009
  7. Apr 06, 2009
  8. Apr 01, 2009
    • Jesse Barnes's avatar
      Match GTT unmap with map in KMS rotation case · 10b5014c
      Jesse Barnes authored and Carl Worth's avatar Carl Worth committed
      
      Missed this when the GTT unmap call was added.  If we don't do this we
      trigger an assertion in libdrm, since the buffer has never been mapped
      normally.
      
      Fixes bug #20943.
      
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      (cherry picked from commit 087f72e1)
      10b5014c
    • Zhenyu Wang's avatar
      Disable LVDS detect methods · 26cab646
      Zhenyu Wang authored and Carl Worth's avatar Carl Worth committed
      Both methods ACPI lid and SWF bit have issues in LVDS detect from
      wider testing. Fallback to origin code.
      (cherry picked from commit 4f046af7)
      26cab646
    • Albert Damen's avatar
      Non-GEM allocations incorrectly force TILE_NONE (bug 20797) · d4301686
      Albert Damen authored and Carl Worth's avatar Carl Worth committed
      With -intel 2.6.3 performance was very bad when using a non gem enabled kernel
      (2.6.27) and EXA. For example sauerbraten ran with 4 fps and screensaver GLBlur
      with 1 fps. With -intel 2.6.1 performance was good using the same kernel.
      
      Git bisecting led me to commit f1ed73c1 (in 2.6
      branch) "Make i830_allocate_memory take tiling parameters" as first bad commit.
      
      Using gdb I found tiling was set exactly the same in 2.6.3 as in 2.6.1, so that
      was good (TILE_XMAJOR for front, back and depth buffers).
      Looking further I found the line mem->tiling = TILE_NONE; (line 961 in
      src/i830_memory.c) at the end of i830_allocate_memory suspicious, as
      mem->tiling now already gets set via i830_allocate_aperture and some buffers do
      have tiling. Removing that line indeed fixed the performance issue. Now
      sauerbraten runs with 30+ fps and GLBlur runs smoothly.
      (cherry picked from commit e964d4e5)
      d4301686
    • Jesse Barnes's avatar
      Require libdrm 2.4.6 for GTT unmap support · 556391cb
      Jesse Barnes authored and Carl Worth's avatar Carl Worth committed
      Need the new functions available.
      (cherry picked from commit 51cf8a45)
      556391cb
    • Jesse Barnes's avatar
      Tiling fixes, third set · f6f59ee2
      Jesse Barnes authored and Carl Worth's avatar Carl Worth committed
      
      Hopefully this concludes the fixes necessary to deal with the various
      combinations of kernel and user level tiling.  We have several cases to
      handle:
        1) KMS (kernel handles all tiling)
        2) UMS w/memory management + kexec fencing (kernel handles all tiling)
        3) UMS w/memory mangement but no kexec fencing (userland handles tiling)
        4) UMS w/o memory management (userland handles tiling)
      
      For cases (1) & (2) we can use GTT mapping, which will give us good
      performance and take care of allocating fence registers as needed.  It's
      important *not* to have userland set up fence regs in this case, since
      the kernel will be using all of them.
      
      For case (3), we use the begin/end GTT map functions provided by libdrm,
      in combination with pinning and fence register setup in i830_memory.c to
      deal with tiled surfaces.  This also gives us good performance and
      correctness.
      
      For case (4) we use the old style virtual mapping + offset for dealing
      with surfaces; note that UXA doesn't seem to work in this configuration
      regardless of these fixes.
      
      Fixes bug #20803.
      
      Reviewed-by: default avatarEric Anholt <eric@anholt.net>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      (cherry picked from commit 8dabcc40)
      f6f59ee2
    • Zhenyu Wang's avatar
      Disable LVDS config parsing from VBT for now · a03feab1
      Zhenyu Wang authored and Carl Worth's avatar Carl Worth committed
      As wider tests showed that this doesn't work for all VBIOS, so
      disable it for now and reenable it after we get reliable method.
      (cherry picked from commit 375b2e40)
      a03feab1
    • Ma, Ling's avatar
      disable center mode for 965GM and G4X platform · 76752488
      Ma, Ling authored and Carl Worth's avatar Carl Worth committed
      
      When disabling VGA mode, usually we don't need to touch VGA center mode.
      However because of hardware reason, for Cresline, Cantiga & Eaglelake platform,
      we have to disable center mode as well. The patch fixed bug- TV Out strobing regression,
      reported by Robert Lowery in intel-gfx@lists.freedesktop.org mailing list.
      
      Signed-off-by: default avatarMa Ling <ling.ma@intel.com>
      (cherry picked from commit b5b37780)
      76752488
    • Kalev Lember's avatar
      Fix VT switch with XV overlay video enabled. · 948fa20b
      Kalev Lember authored and Carl Worth's avatar Carl Worth committed
      
      drm_intel_bo_unpin() was called with NULL argument.
      
      Signed-off-by: default avatarKalev Lember <kalev@smartlink.ee>
      (cherry picked from commit 74d0713e)
      948fa20b
    • Rémi Cardona's avatar
      clean up man page generation and remove all traces of the i810 driver · 79aebcb7
      Rémi Cardona authored and Carl Worth's avatar Carl Worth committed
      The i810 compatibility symlink has been broken since libpciaccess, so just
      let it die.
      (cherry picked from commit b345b4e6)
      79aebcb7
    • Jesse Barnes's avatar
      Don't manage fences part two · 3afc0d10
      Jesse Barnes authored and Carl Worth's avatar Carl Worth committed
      Don't try to clear fences that were never installed.  Missed this bit in
      the last fix for #20265.
      (cherry picked from commit 48b91e06)
      3afc0d10
  9. Mar 19, 2009
    • Jesse Barnes's avatar
      Don't install fences if the kernel is managing them · e2465249
      Jesse Barnes authored and Carl Worth's avatar Carl Worth committed
      
      If execbuffer is setting up fences, it also means that the kernel is
      managing them at pin time, so installing one in the 2D driver in that
      case is an error.  The fence should stick around as long as the buffer
      is pinned (the kernel won't steal these), though it will be freed at
      leavevt and re-allocated at entervt.
      
      On 965+ chips, the pin ioctl will *not* install a fence reg, but that's
      also ok because all 965+ operations include tiling bits, and sw
      fallbacks will be protected by prepare/finish access hooks, which will
      either access the backing store or use the GTT, which will ensure proper
      fencing at fault time.
      
      Fixes #20265.
      
      Acked-by: default avatarEric Anholt <eric@anholt.net>
      (cherry picked from commit 636d252f)
      e2465249
    • Kristian Høgsberg's avatar
      Drop Legacy3D option, only use fixed texture space with non-gem. · 1883d912
      Kristian Høgsberg authored and Carl Worth's avatar Carl Worth committed
      With this change, we always expect the 3D driver to use GEM textures
      when the 2D driver uses GEM.  When GEM is not available or disabled,
      we fall back to legacy fixed textures.
      (cherry picked from commit 73db44e7)
      1883d912
    • Ma Ling's avatar
      Set SSC frequency for 8xx chips correctly · db3675ce
      Ma Ling authored and Carl Worth's avatar Carl Worth committed
      All 8xx class chips have the 66/48 split, not just 855.
      
      Fixes #18358.
      (cherry picked from commit 85e6b528)
      db3675ce
Loading