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Commit 71fa292d authored by Chris Wilson's avatar Chris Wilson :thinking: Committed by Emil Velikov
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i965: Prevent coordinate overflow in intel_emit_linear_blit


Fixes regression from
commit 8c17d538
Author: Kenneth Graunke <kenneth@whitecape.org>
Date:   Wed Apr 15 03:04:33 2015 -0700

    i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.

which adjusted the coordinates to be relative to the nearest cacheline.
However, this then offsets the coordinates by up to 63 and this may then
cause them to overflow the BLT limits. For the well aligned large
transfer case, we can use 32bpp pixels and so reduce the coordinates by
4 (versus the current 8bpp pixels). We also have to be more careful
doing the last line just in case it may exceed the coordinate limit.

Reported-and-tested-by: default avatar <kaillasse91@hotmail.fr>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90734


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Ian Romanick <ian.d.romanick@intel.com>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: default avatarAnuj Phogat <anuj.phogat@gmail.com>
(cherry picked from commit d38a5601)
[Emil Velikov: drop the extra INTEL_MIPTREE_TRMODE_NONE arguments]
Signed-off-by: default avatarEmil Velikov <emil.l.velikov@gmail.com>

Conflicts:
	src/mesa/drivers/dri/i965/intel_blit.c
parent 20939440
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