- Jan 29, 2018
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Emil Velikov authored
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
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- Jan 26, 2018
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Emil Velikov authored
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
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Sort the output to ensure build reproducibility Signed-off-by: Maxin B. John <maxin.john@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Fixes: 0ab04ba9 ("anv: Use python to generate ICD json files") Reviewed-by: Dylan Baker <dylan@pnwbakers.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 8116b917)
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-1 is considered an error for EGL_ANDROID_native_fence_sync, so we need to actually create a sync file. Fixes: f536f452 "radeonsi: implement sync_file import/export" Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 5a3404d4)
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This seems to be broken, at least the cts tests fail. This fixes: dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_4 dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_8 2 samples seems to pass fine, amdvlk doesn't appear to enable TC for possibly some other reasons here. This is most likely a hack. v1.1: add a bit of explaination text. (Samuel) Fixes: ad3d98da (radv: enable tc compatible htile for d32s8 also.) Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit f4c534ef)
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Emil Velikov authored
The default was toggled a while back, but the text wasn't updated. Fixes: bd526ec9 ("configure: Always default to --enable-driglx-direct") Cc: Jon TURNEY <jon.turney@dronecode.org.uk> Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> (cherry picked from commit 6aeef546)
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We are not allowed to modify the incoming coords values, or things may crash (as we may be inside a llvm conditional and the values may be used in another branch). I recently broke this when fixing an issue with NaNs and seamless cube map filtering, and it causes crashes when doing cubemap filtering if the min and mag filters are different. Add const to the pointers passed in to prevent this mishap in the future. Fixes: a485ad0b ("gallivm: fix an issue with NaNs with seamless cube filtering") Reviewed-by: Jose Fonseca <jfonseca@vmware.com> (cherry picked from commit 4fe662c5)
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When LLVM is built inside of a git repo (even way below, e.g. /usr/ports/.git exists, and LLVM is built in /usr/ports/devel/llvm50/work), its version becomes something like 5.0.0git-f8ab206b2176. New meson versions already handle this, but we support older versions too. Fixes: 673dda83 ("meson: build "radv" vulkan driver for radeon hardware") Reviewed-by: Dylan Baker <dylan@pnwbakers.com> (cherry picked from commit 8fae5edd)
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get_pkgconfig_variable('cflags') always returns an empty list, it's a function for getting *custom* variables. Meson does not yet support asking for cflags, so explicitly invoke pkg-config for now. Fixes: 68076b87 ("meson: build gallium vdpau state tracker") Fixes: a817af8a89eb ("meson: build gallium xvmc state tracker") Fixes: 1d36dc67 ("meson: build gallium omx state tracker") Fixes: 5a785d51 ("meson: build gallium va state tracker") Reviewed-by: Dylan Baker <dylan.c.baker@intel.com> (cherry picked from commit 53f91312)
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Fixes: 66f97f66 ("meson: build radeonsi") Reviewed-by: Emil Velikov <emil.velikov@colalbora.com> Reviewed-by: Dylan Baker <dylan.c.baker@intel.com> (cherry picked from commit 7c8cfe2d)
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Fixes: d1992255 ("meson: Add build Intel "anv" vulkan driver") Reported-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Dylan Baker <dylan.c.baker@intel.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit 5781c3d1)
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We need to enable the pos float location 2 mode anytime we have persample not just when forced by the frag shader. This fixes: dEQP-VK.pipeline.multisample.min_sample_shading* Fixes: 58c97a07 (radv: enable location at sample when persample is forced.) Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 29855454)
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Before we were adding -DHAVE_SSE41 which isn't what the code is looking for, so some uses of the sse4.1 code were always being skipped. v2: Don't add any compile check for the quite old -msse4.1 option (Dylan) Fixes: 84486f64 ("meson: Enable SSE4.1 optimizations") Reviewed-by: Dylan Baker <dylan@pnwbakers.com> (cherry picked from commit 0b8d38bd)
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This fixes another regression from commit 8e4efdc8 ("vbo: optimize some display list drawing"). The problem was the min_index, max_index values passed to the vbo drawing function were not computed to compensate for the biased prim::start values. https://bugs.freedesktop.org/show_bug.cgi?id=104746 https://bugs.freedesktop.org/show_bug.cgi?id=104742 https://bugs.freedesktop.org/show_bug.cgi?id=104690 Tested-by: Clayton Craft <clayton.a.craft@intel.com> Fixes: 8e4efdc8 ("vbo: optimize some display list drawing") Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk> (cherry picked from commit 365a48ab)
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This is ported from radeonsi and fixes: dEQP-VK.pipeline.multisample_shader_builtin.sample_mask.bit_* v2: don't call this path for radeonsi, it does it in the epilog. use the radeonsi code path. v3: handle NULL pCreateInfo->pMultisampleState properly (Samuel) v3.1: set ps_iter_samples default to 1 (Bas) Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Fixes: bdcbe7c7 (radv: add sample mask input support) Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 766589d8)
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radeonsi has a workaround for this, but it uses a R16A16 format, which vulkan doesn't have, we could probably come up with a work around but for now just avoid hw resolves. Fixes: dEQP-VK.renderpass.suballocation.multisample.r16g16_*norm* Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Fixes: 2a04f548 (radv/meta: select resolve paths) Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit c727ea93)
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From reading AMDVLK it currently never uses hw resolve paths. This patch takes from radeonsi which doesn't use hw resolve for integer formats, and does the same for radv. This fixes: dEQP-VK.renderpass.suballocation.multisample*uint tests. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Fixes: 2a04f548 (radv/meta: select resolve paths) Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 4df414bb)
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Some of the hw resolve passes need the SPI color format setup correctly. This fixes lots of 16-bit and 32-bit format tests in dEQP-VK.renderpass.suballocation.multisample* Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Fixes: f4e499ec "radv: add initial non-conformant radv vulkan driver" Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 316d7621)
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Fixes: 6b4c7047 ("meson: build gallium nine state_tracker") Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Dylan Baker <dylan.c.baker@intel.com> (cherry picked from commit 4b4d929c)
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Fixes: 4e0d99a6 "r100: Use shared debug code" Cc: Pauli Nieminen <suokkos@gmail.com> Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Eric Anholt <eric@anholt.net> (cherry picked from commit eee8dd7c)
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The GPU hang caused by push constants is apparently fixed, so let's enable them again. Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com> Cc: "18.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit bcfd78e4)
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Similar to the GL driver, ignore 3DSTATE_CONSTANT_* packets when doing a context restore. Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: "18.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 78c125af)
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These packets were causing GPU hangs when the context was restored, possibly because they were pointing to BO's that were already unreferenced. So we tell the hardware to ignore such packets after the batch buffer ends, since we know those BO's are not around anymore. This change fixes GPU hangs on CNL. The (partial) solution to this problem so far was to entirely disable push constants on this platform. Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com> Cc: Kenneth Graunke <kenneth@whitecape.org> Cc: "18.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit ca19ee33)
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We assigned the function that gets the device uuid to the GetDriverUuid function pointer and the function that gets the driver uuid to the GetDeviceUuid function pointer inside the state tracker. Exchanged the pointers. cc: mesa-stable@lists.freedesktop.org Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit 8096b558)
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UBOs are constants buffers. Cc: "18.0" <mesa-stable@lists.freedesktop.org> Fixes: 41c36c45 ("amd/common: use ac_build_buffer_load() for emitting UBO loads") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Tested-by: Alex Smith <asmith@feralinteractive.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 49b0a140)
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Without this, we may end up dereferencing blend before we check for binding->index != UINT32_MAX. However, Vulkan allows the blend state to be NULL so long as you don't have any color attachments. This fixes a segfault when running The Talos Principal. Fixes: 12f4e00b Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Smith <asmith@feralinteractive.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit c8949e24)
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18fde36c changed the way temporary registers were allocated in lower_integer_multiplication so that we allocate regs_written(inst) space and keep the stride of the original destination register. This was to ensure that any MUL which originally followed the CHV/BXT integer multiply regioning restrictions would continue to follow those restrictions even after lowering. This works fine except that I forgot to reset the register file to VGRF so, even though they were assigned a number from alloc.allocate(), they had the wrong register file. This caused some GLES 3.0 CTS tests to start failing on Sandy Bridge due to attempted reads from the MRF: ES3-CTS.functional.shaders.precision.int.highp_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.int.mediump_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.int.lowp_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.uint.highp_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.uint.mediump_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.uint.lowp_mul_fragment.snbm64 This commit remedies this problem by, instead of copying inst->dst and overwriting nr, just make a new register and set the region to match inst->dst. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103626 Fixes: 18fde36c Cc: "17.3" <mesa-stable@lists.freedesktop.org> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit db682b8f)
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v2: Only add as dependencies for gallium-osmesa and gallium-xlib CC: <mesa-stable@lists.freedesktop.org> Signed-of-by: Chuck Atkins <chuck.atkins@kitware.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit 6ac5e851)
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LLVM 3.9 was not taken into account in initial check-in. Fixes: 01ab218b ("swr/rast: Initial work for debugging support.") cc: mesa-stable@lists.freedesktop.org Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104749 Acked-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com> (cherry picked from commit 0e879aad)
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383 Fixes: ea0d2e98 Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 20f70ae3)
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Instead of keeping an array of booleans, we now hang onto an array of isl_aux_usage enums. This means that the thing we are passing from brw_draw.c to surface state setup is the thing that surface state setup actually needs instead of an input to compute what it needs. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit e52a9f18)
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The only purpose of this function is to disable aux on texture surfaces when the corresponding renderbuffer has aux disabled. However, the act of disabling aux on the renderbuffer will cause it to be resolved and intel_miptree_texture_aux_usage will already check the resolved status of a texture and return ISL_AUX_USAGE_NONE for it. Even if we used CCS for it, that wouldn't really be a problem because the CCS will be in the pass-through state and so it would effectively be ignored. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 468ea3cc)
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Only one of the callers of intel_miptree_render_aux_usage actually took brw->draw_aux_buffer_disabled into account. This was causing us to ignore draw_aux_buffer_disabled for the intel_miptree_prepare_render. This isn't a problem because the draw_aux_buffer_disabled entry was set during texture preparation and we already did the resolve at that time. However, this also meant that the aux_usage we were passing to brw_cache_flush_for_render and brw_render_cache_add_bo was wrong so our automatic cache flushing around aux_usage changes wasn't happening. This was causing GPU hangs in Oxenfree. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104711 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383 Fixes: ea0d2e98 Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit d38ec24f)
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Both callers of intel_miptree_prepare/finish_render have to call intel_miptree_render_aux_usage anyway for other reasons. They may as well pass the result in instead of us calling it again. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit dfe02179)
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CC: 18.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Dylan Baker <dylan@pnwbakers.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit c38c60a6)
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Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 022c5b22)
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104546 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (cherry picked from commit ec4bb693)
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Tested-by: Józef Kucia <joseph.kucia@gmail.com> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Cc: "18.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4064fe59)
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While we're here, make it an anv_address. Tested-by: Józef Kucia <joseph.kucia@gmail.com> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Cc: "18.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 38ec7804)
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Tested-by: Józef Kucia <joseph.kucia@gmail.com> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Cc: "18.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 95ff2322)
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