• Mauro Carvalho Chehab's avatar
    edac: move dimm properties to struct dimm_info · 084a4fcc
    Mauro Carvalho Chehab authored
    On systems based on chip select rows, all channels need to use memories
    with the same properties, otherwise the memories on channels A and B
    won't be recognized.
    However, such assumption is not true for all types of memory
    Controllers for FB-DIMM's don't have such requirements.
    Also, modern Intel controllers seem to be capable of handling such
    So, we need to get rid of storing the DIMM information into a per-csrow
    data, storing it, instead at the right place.
    The first step is to move grain, mtype, dtype and edac_mode to the
    per-dimm struct.
    Reviewed-by: default avatarAristeu Rozanski <arozansk@redhat.com>
    Reviewed-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
    Acked-by: default avatarChris Metcalf <cmetcalf@tilera.com>
    Cc: Doug Thompson <norsk5@yahoo.com>
    Cc: Borislav Petkov <borislav.petkov@amd.com>
    Cc: Mark Gross <mark.gross@intel.com>
    Cc: Jason Uhlenkott <juhlenko@akamai.com>
    Cc: Tim Small <tim@buttersideup.com>
    Cc: Ranganathan Desikan <ravi@jetztechnologies.com>
    Cc: "Arvind R." <arvino55@gmail.com>
    Cc: Olof Johansson <olof@lixom.net>
    Cc: Egor Martovetsky <egor@pasemi.com>
    Cc: Michal Marek <mmarek@suse.cz>
    Cc: Jiri Kosina <jkosina@suse.cz>
    Cc: Joe Perches <joe@perches.com>
    Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
    Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
    Cc: Hitoshi Mitake <h.mitake@gmail.com>
    Cc: Andrew Morton <akpm@linux-foundation.org>
    Cc: James Bottomley <James.Bottomley@parallels.com>
    Cc: "Niklas Söderlund" <niklas.soderlund@ericsson.com>
    Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
    Cc: Josh Boyer <jwboyer@gmail.com>
    Cc: Mike Williams <mike@mikebwilliams.com>
    Cc: linuxppc-dev@lists.ozlabs.org
    Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
i3200_edac.c 12.2 KB