[WIP] phy: phy-rockchip-samsung-hdptx: Add FRL & EARC support

For upstreaming, this requires extending the standard PHY API to support
HDMI configuration options [1].

Currently, the bus_width PHY attribute is used to pass clock rate and
flags for 10-bit color depth, FRL and EARC. This is done by the HDMI
bridge driver via phy_set_bus_width().

[1]: https://lore.kernel.org/all/20240306101625.795732-3-alexander.stein@ew.tq-group.com/



Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
(cherry picked from commit 2cbcfc1d3821313cabe8527504b3c8b57c1b3c77
 https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux)