nir/glsl: Add another way of doing lower_imul64 for gen8+
On Gen 8 and 9, "mul" instruction supports 64 bit destination type. We can reduce our 64x64 int multiplication from 4 instructions to 3. Also instead of emitting two mul instructions, we can emit single mul instuction and extract low/high 32 bits from 64 bit result for [i/u]mulExtended v2: 1) Allow lower_mul_high64 to use new opcode (Jason Ekstrand) 2) Add lower_mul_2x32_64 flag (Matt Turner) 3) Remove associative property as bit size is different (Connor Abbott) v3: Fix indentation and variable naming convention (Jason Ekstrand) Signed-off-by:Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net>
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- src/compiler/nir/nir.h 4 additions, 0 deletionssrc/compiler/nir/nir.h
- src/compiler/nir/nir_lower_int64.c 23 additions, 6 deletionssrc/compiler/nir/nir_lower_int64.c
- src/compiler/nir/nir_opcodes.py 6 additions, 0 deletionssrc/compiler/nir/nir_opcodes.py
- src/compiler/nir/nir_opt_algebraic.py 2 additions, 0 deletionssrc/compiler/nir/nir_opt_algebraic.py
- src/intel/compiler/brw_compiler.c 7 additions, 0 deletionssrc/intel/compiler/brw_compiler.c
- src/intel/compiler/brw_fs_nir.cpp 5 additions, 0 deletionssrc/intel/compiler/brw_fs_nir.cpp
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