intel: fix URB programming for GT1s
We're missing a programming restriction. Hopefully fixing dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic_1.* on Gfx9atoms Signed-off-by:Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Closes: mesa/mesa#6216 Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Caio Oliveira <caio.oliveira@intel.com>.> Tested-by:
Mark Janes <markjanes@swizzler.org> Part-of: <mesa/mesa!15596>
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