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nak: calculate instruction deps with the carry register

Benjamin Lee requested to merge benjaminl/mesa:nak/sm50-carry-deps into nak/sm50

Some SM50 instructions (like IADD) read/write to a carry register. This introduces instruction dependencies that NAK currently misses, breaking sched and DCE. The approach I took to fix this is representing the carry register as a "register file" so that it can re-use all the existing code for calculating deps based on normal registers.

Example nir_opt_iadd64 sched from before this change:

    IADD R2.CC, R2, R4 delay=1 wt=001010
    IADD.X R3, R3, R5 delay=6

and after:

    IADD2 { R2, CC0 }, R2, R4 delay=6 wt=001010
    IADD2 R3, R3, R5, CC0 delay=6
Edited by Benjamin Lee

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