WIP: Add atomic int64 support to TGSI, and nvc0

Only top-3 changes are really part of this. Unfortunately gitlab doesn't make it easy to submit a MR which includes work from other MR's.

Noticed that we added support for NV_shader_atomic_int64, but it wasn't implemented for nouveau.

The implementation is fairly trivial, but need to do a bit more checking across the nvc0 emitter generations that the correct code is being emitted. The SSBO bits pass on GP108, but need to fix the emitter for shared. Probably more stuff on other gens.

Would be nice to get some reviews for the tgsi and st/mesa changes while I work out the nvc0 instruction emission bits.