pan/mdg: Fix register allocation for 16b vectors
When using swizzles on 16bit vectors, the swizzle in one vec4(16b) nibble can't cross the nibble boundary. That means you can't have something like
mov r0.u16.xyz, r1.u16.zwe, #0
is not allowed.
Let's take this alignment constraint into account when allocating registers.
Edited by Boris Brezillon