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freedreno/ir3: define ISA in xml

Rob Clark requested to merge robclark/mesa:wip/ir3xml into master

Fairly incomplete at this point, but an idea I was playing around with to come up with a less hand-coded asm/disasm.

Partially inspired by the armv8 machine readable ISA specification which defines for various instructions, bits that must be zero/one, and so on. But to avoid a vast amount of copy/paste, things are defined in terms of a hierarchical tree of bitsets which can inherit from each other. At the toplevel, there is a tree of bitsets defining all instructions. But to match sub-encodings (ie. add.f r1.y, r2.x, c0.w vs add.f r1.y, r2.x, r0.w) bitset fields can refer back to other trees of bitsets.

Part of the motivation is that cat6 encoding (in particular) has started becoming a mess of magic pad fields.. And it sounds like we'll start getting some new instructions in later a6xx.

Still need to sort out some details, like how to deal with bits that modify other fields (ie. whether src or dst is half or full precision, or when the precision of a src/dst is inferred from a type field). And haven't really started thinking about the encoding direction yet.

One nice benefit is at the leaf (instruction) nodes in the tree, we end up with a bitmask of dontcare bits, which makes it really easy to highlight if we start seeing unexpected bits (which could indicate a new instruction encoding).

Edited by Rob Clark

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