anv: Add support for shaderInt64 on Gen11+

On Gen11, we lost the dedicated int64 hardware. This meant turning off the shaderInt64 feature. Thanks to OpenGL and OpenCL, we have all of the necessary lowering code for most stuff in NIR. The one remaining sticky bit was subgroup ops. This MR solves this problem by a combination of NIR and back-end lowering. Roughly, they're handled as follows:

1. There are a bunch of ops including all data motion ops (shuffle, broadcast, read_invocation, etc.) and the bitwise arithmetic ops which can be trivially split by doing the subgroup op on the top and bottom 32-bit chunks independently.
2. vote_ieq can be done on the two halves and then the results can be ANDed together.
3. For scan/reduce ops with iadd as the combine op, we can lower it in NIR but we have to be careful. Instead of splitting it into two 32-bit chunks, we split it into 3 24-bit (or smaller) chunks. This way, we can add without worrying about overflow.
4. For mul and min/max, there's nothing for it; we have to lower in the back-end. If someone desperately wanted NIR lowering for these, it could be done, but it would end up being a rather naive loop.

There were also a decent little pile of bugs and small back-end changes to fix along the way. Most of them are pretty straightforward, though.