iris: Honor scanout requirement from DRI
Instead of translating PIPE_BIND_DISPLAY_TARGET as ISL_SURF_USAGE_DISPLAY_BIT, translate PIPE_BIND_SCANOUT.
PIPE_BIND_DISPLAY_TARGET isn't used for dri images and seem to
be set only for fake winsys buffers (which aren't displayed).
The trouble is that a fake buffer could be multisampled and we
cannot have multisampled surface with display bit.
Closes: #2313 (closed)
Now the tests piglit.spec.!opengl 1_1.read-front
fail instead of crashing: https://mesa-ci.01.org/global_logic/builds/260/group/63a9f0ea7bb98050796b649e85481845
Also I'm still somewhat confused about what PIPE_BIND_DISPLAY_TARGET
actually represent.
* ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to
pipe_screen::flush_front_buffer must have this flag set.