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iris: drop cache coherent cpu mapping with scanout resources

Lionel Landwerlin requested to merge llandwerlin/mesa:review/iris-cache-coherency-display-issue into master

If a resource is going to be used for scanout, drop cache coherency for cpu mappings.

Buffer allocated by X can be written from CPU when no compositor is active and scanned by the display HW at the same time.

Many thanks to Michel Dänzer for the hint!

Signed-off-by: Lionel Landwerlin lionel.g.landwerlin@intel.com Cc: mesa-stable@lists.freedesktop.org Closes: #2552 (closed) Closes: xorg/xserver#1012 (closed)

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