iris: drop cache coherent cpu mapping with scanout resources (!4533) · Merge requests · Mesa / mesa · GitLab

Due to an influx of spam, we have had to impose restrictions on new accounts. Please see this wiki page for instructions on how to get full permissions. Sorry for the inconvenience.

Lionel Landwerlin requested to merge llandwerlin/mesa:review/iris-cache-coherency-display-issue into master Apr 13, 2020

If a resource is going to be used for scanout, drop cache coherency for cpu mappings.

Buffer allocated by X can be written from CPU when no compositor is active and scanned by the display HW at the same time.

Many thanks to Michel Dänzer for the hint!

Signed-off-by: Lionel Landwerlin lionel.g.landwerlin@intel.com Cc: mesa-stable@lists.freedesktop.org Closes: #2552 (closed) Closes: xorg/xserver#1012 (closed)