freedreno/ir3: round-robin RA, sync avoidance, etc.

And a few other misc things. The idea behind the RR RA is to use feedback from first RA pass to pick a target register usage to round-robin within. If we get it wrong, we increase the target as needed.. probably best to err a bit on the conservative (fewer registers) but not too much. This gives postsched more flexibility to move things around (ie. avoids instruction dependencies due to needing the same register). On top of this, let postsched use this new-found flexibility to try harder to avoid (ss) stalls.