intel/fs: Combine adjacent memory barriers

Caio Oliveira requested to merge cmarcelo/mesa:r/intel-memory-barriers into master

If we have two scoped memory barriers that will end up just being lowered to the same memory fence twice, merge them into a single scoped barrier.

With addition of Vulkan Memory Model, SPIR-V (and also NIR) has more granular control of barrier behavior than is generated for the current hardware, causing such redundancies.

This cleans up redundant barriers from various dEQP-VK.memory_model.* tests.

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