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WIP: freedreno/ir3: post-RA sched pass

Closed Rob Clark requested to merge robclark/mesa:wip/post-sched into master

looking at manhattan, even without RA doing round-robin register allocation, this is ~8% drop in instruction count with matching fps win.. looking at individual shaders, there are some wins but also some losses, so it is possible that the instruction selection or something else is still not optimal.

I expect if we had a good way to pick a target register usage to round-robin between in RA step, the post-ra sched pass would be more effective.

Edited by Rob Clark

Merge request reports

Merge request pipeline #91338 passed

Merge request pipeline passed for 9702e832

Closed by Rob ClarkRob Clark 4 years ago (Jan 27, 2020 11:39pm UTC)

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  • The changes were not merged into master.

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