WIP: freedreno/ir3: post-RA sched pass
looking at manhattan, even without RA doing round-robin register allocation, this is ~8% drop in instruction count with matching fps win.. looking at individual shaders, there are some wins but also some losses, so it is possible that the instruction selection or something else is still not optimal.
I expect if we had a good way to pick a target register usage to round-robin between in RA step, the post-ra sched pass would be more effective.