intel/brw: Xe2 TGM and UGM restrict loads of 8 or more to SIMD16 (!29356) · Merge requests · Mesa / mesa · GitLab

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Rohan Garg requested to merge shadeslayer/mesa:review/xe2_tgm_ugm_restrictions into main May 23, 2024

What does this MR do and why?

intel/brw: Xe2 TGM and UGM restrict loads of 8 or more to SIMD16

Rework:
 * Jordan: Replace conditionals with if/else

Signed-off-by: Rohan Garg <rohan.garg@intel.com>