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freedreno,tu: Disable UBWC for storage images on a750

Connor Abbott requested to merge cwabbott0/mesa:review/tu-a750-disable-ubwc into main

This caused tons of test failures, because there seems to be a bug where image writes via stib aren't visible to loads via the texture cache when UBWC is enabled. The blob seems to not hit it because it overflushes UCHE with transfers, and in most of the tests the thing reading the image is a transfer command, but this should also be a problem when reading "normally" via texture sampling in a shader and even via readonly image loads, and according to the memory model spec this scenario doesn't require any flushing in pipeline barriers at all, only Device scope availability/visibility barriers.

If we decide that we need to flush UCHE more often, then we need more CTS tests for the scenario described and we likely will need to flush in the shader under some circumstances.

Edited by Connor Abbott

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