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ir3: optimize SSBO accesses using isam.v and immediate offsets

Job Noorman requested to merge jnoorman/mesa:ir3-isamv-ssbo-offsets into main

This series improves SSBO accesses on a6xx gen4 and a7xx in two ways: by using isam.v for multi-component SSBO loads and by using the new immediate offset fields in isam.v, ldib.b, and stib.b.

Besides adding new encodings for isam.v, supporting it is trivial as the scalarization step simply needs to be skipped whenever isam.v can be used.

To support the immediate offsets, a few steps needed to be taken:

  • Add a BASE index to load/store_ssbo_ir3 to store the offset.
  • Make nir_opt_offsets compatible with ir3:
    • Since load_ssbo_ir3 can either be emitted as isam.v (8-bit immediate offset) or ldib.b (7-bit), and nir_opt_offsets currently uses a single max offset per storage type, a new callback was added that can set the max offset on a per-instruction basis.
    • nir_opt_offsets currently bails-out on potentially wrapping additions. However, on ir3 the immediate offset addition wraps the same way as normal unsigned additions so this isn't necessary. An option was added to skip the check for wrapping additions.
Edited by Job Noorman

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