intel/brw/validate: Support Xe2 for 2 types of register access tests

The first 2 patches are for the validation test that a destination should use vstride when accessing multiple registers.

The last 2 patches update the check that math instructions are split evenly between registers when multiple registers are used.

In both cases, the validation changes from attempting to represent bytes accessed in the grf as a mask to using a mask of grfs accessed. In the latter case, @idr has some reservations about this approach. 1

Cc: @idr, @shadeslayer, @currojerez