intel/fs: move final send lowering up into the IR
What does this MR do and why?
Because we do emit the final send message form in code generation, a
lot of emissions look like this :
add(8) vgrf0, u0, 0x100
mov(1) a0.1, vgrf0 # emitted by the generator
send(8) ..., a0.1
By moving address register manipulation in the IR, we can get this
down to :
add(1) a0.1, u0, 0x100
send(8) ..., a0.1
This reduce register pressure around some send messages by 1 vgrf.
All lost shaders in the below results are fragment SIMD32, due to the throughput estimator. If turned off, we loose no SIMD32 shaders with this change.
DG2 results :
PERCENTAGE DELTAS Shaders Instrs Subgroup size Cycle count Spill count Fill count Max live registers Max dispatch width
cyberpunk_2077 10587 -0.43% -0.01% +2.89% -5.88% -6.90% -0.22% -0.30%
----------------------------------------------------------------------------------------------------------------------------
All affected 10252 -0.44% -0.01% +2.89% -5.88% -6.90% -0.22% -0.31%
----------------------------------------------------------------------------------------------------------------------------
Total 10587 -0.43% -0.01% +2.89% -5.88% -6.90% -0.22% -0.30%
(gaining 32, loosing 49)
PERCENTAGE DELTAS Shaders Cycle count Max live registers Max dispatch width
dota2_g2 1498 +0.22% -0.01% -0.76%
-----------------------------------------------------------------------------
All affected 192 +2.58% -0.12% -7.06%
-----------------------------------------------------------------------------
Total 1498 +0.22% -0.01% -0.76%
(loosing 7)
PERCENTAGE DELTAS Shaders Instrs Cycle count Max live registers Max dispatch width
strange_brigade 4108 -1.08% +1.69% -0.15% -0.10%
---------------------------------------------------------------------------------------
All affected 3649 -1.10% +1.71% -0.16% -0.11%
---------------------------------------------------------------------------------------
Total 4108 -1.08% +1.69% -0.15% -0.10%
(loosing 2)
TGL results :
PERCENTAGE DELTAS Shaders Instrs Subgroup size Cycle count Spill count Fill count Max live registers Max dispatch width
cyberpunk_2077 10373 -0.00% +0.01% +0.38% -0.33% -0.15% -0.07% +0.04%
----------------------------------------------------------------------------------------------------------------------------
All affected 7087 -0.00% +0.01% +0.49% -0.33% -0.15% -0.09% +0.06%
----------------------------------------------------------------------------------------------------------------------------
Total 10373 -0.00% +0.01% +0.38% -0.33% -0.15% -0.07% +0.04%
(gaining 4, loosing 3)
PERCENTAGE DELTAS Shaders Cycle count Max live registers Max dispatch width
dota2_g2 1517 +0.34% -0.77% -6.13%
-----------------------------------------------------------------------------
All affected 234 +3.12% -6.11% -27.23%
-----------------------------------------------------------------------------
Total 1517 +0.34% -0.77% -6.13%
(loosing 52)
PERCENTAGE DELTAS Shaders Instrs Cycle count Max live registers Max dispatch width
strange_brigade 1951 +0.00% +1.02% -0.55% -0.30%
---------------------------------------------------------------------------------------
All affected 988 +0.01% +1.64% -0.91% -0.60%
---------------------------------------------------------------------------------------
Total 1951 +0.00% +1.02% -0.55% -0.30%
(loosing 3)
PERCENTAGE DELTAS Shaders Instrs Cycle count Max dispatch width
witcher_3_dxvk_g2 1034 -0.00% -0.00% -0.18%
--------------------------------------------------------------------
All affected 4 -0.40% -1.44% -33.33%
--------------------------------------------------------------------
Total 1034 -0.00% -0.00% -0.18%
(loosing 1)
Includes !28188 (merged)
Will add some shader-db stats shortly.
Edited by Lionel Landwerlin