intel/brw: Remove SIMD lowering to a larger SIMD size

On Gfx4, we had to emulate SIMD8 texturing with SIMD16 for some message types. This ceased to be a thing with Gfx5 and hasn't come up again.

So, we can simply assert that we are truly "SIMD splitting", and assume that the lowered size is smaller than the original instruction size. This avoids some mental complexity as we can always think of the split instructions as taking apart, operating on, and recombining subsets of the original values.