freedreno/afuc: Misc updates
This MR:
- Finishes (for now) figuring out what the unknown flags for cread/cwrite/load/store do, and comes up with syntax to describe them. Now there is no more mysterious
, 0x0
after each instruction and preincrement isn't specified with a mysterious, 0x4
. Exactly how(sdsN)
works isn't too well understood, but it's only used in exactly one place in most firmwares so it isn't too important to nail down.- As part of this, we add a whole new register space, and implement the stack "properly" using it. We can now trace how the preemption routine saves/restores the stack.
- Adds trivial registers for a7xx copied from a6xx, and a few new draw-state-related registers added from investigating
(sdsN)
. - Adds some documentation updates for a7xx
- Fixes generation autodetection for a7xx