Skip to content

ir3: don't load 64b values from preamble

Job Noorman requested to merge jnoorman/mesa:ir3-no-load-preamble-64b into main

ir3 currently fails to handle 64b @load_preamble intrinsics but nothing prevents nir_opt_preamble from creating them. This patch ensures that 64b instructions are ignored by nir_opt_preamble.

Note that this does not necessarily mean that these values cannot be hoisted to the preamble anymore. In the failing tests, the 64b value came from a pack instruction and with this patch, the pack's inputs are loaded from the preamble.

For example, this is the relevant NIR from spec@arb_gpu_shader_fp64@execution@fs-indirect-temp-double-dst without this patch:

impl main {
...
    64    %1333 = @load_preamble () (base=15)
...
}

impl @preamble {
...
    64    %622 = pack_64_2x32_split %620, %621
                 @store_preamble (%622) (base=15)
...
}

With this patch, this becomes:

impl main {
...
    32    %1334 = @load_preamble () (base=16)
    32    %1333 = @load_preamble () (base=15)
    64     %619 = pack_64_2x32_split %1333, %1334
...
}

impl @preamble {
...
                 @store_preamble (%621) (base=16)
                 @store_preamble (%620) (base=15)
...
}

Fixed Piglit tests:

  • spec@arb_gpu_shader_fp64@execution@fs-indirect-temp-double-dst
  • spec@arb_gpu_shader_fp64@execution@built-in-functions@fs-frexp-dvec4-variable-index

Note that these tests only pass when !26175 (merged) is also applied.

This patch has no impact on shader-db.

Merge request reports