Skip to content

intel: Skip bit6 swizzle test in Gen8+

Caio Oliveira requested to merge cmarcelo/mesa:review/skip-swizzle-test-in-gen8+ into master

Per Broadwell PRM, we can skip the bit6 swizzle check and just assume false.

Tiled Channel Select Decision

Before Gen8, there was a historical configuration control field to swizzle address bit[6] for in X/Y tiling modes. This was set in three different places: TILECTL[1:0], ARB_MODE[5:4], and DISP_ARB_CTL[14:13].

For Gen8 and subsequent generations, the swizzle fields are all reserved, and the CPU's memory controller performs all address swizzling modifications.

MR originated from a conversation with Ken.

Merge request reports