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ir3: Fix vectorizer condition for SSBOs

SSBO access works very differently from UBO access. Straddling loads/stores isn't an issue, loads/stores instead must be aligned to the element size and can have up to 4 components.

We support 16-bit access with SSBOs on a650+, and sometimes the vectorizer tries to create a misaligned 32-bit access when combining 32-bit and 16-bit accesses. The UBO-focused logic didn't reject this, which is now fixed. This fixes a number of VK-CTS regressions on a650+.

Fixes: bf49d4a0 ("freedreno/ir3: Enable load/store vectorization for SSBO access, too.")

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