nouveau: Align tlsBase to 128-bits in RegAlloc
Without this, 128-bit or 64-bit register spills can generate unaligned loads and stores.
Fixes glsl-1.50/execution/variable-indexing/gs-input-array-vec3-index-rd with NV50_PROG_USE_NIR=1
Without this, 128-bit or 64-bit register spills can generate unaligned loads and stores.
Fixes glsl-1.50/execution/variable-indexing/gs-input-array-vec3-index-rd with NV50_PROG_USE_NIR=1