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intel: Last round of XeHP+ compiler fixes for the year.

This MR fixes some synchronization issues that would've shown up as conformance failures on upcoming XeHP+ platforms. The first one is the result of an optimization performed by the lower_scoreboard pass which relies on some assumptions that will no longer hold on XeHP -- The first patch of the series fixes it.

The rest of the series addresses the synchronization issues with several of the Vulkan subgroup operations, all of them are caused by the 64-bit variants of these operations being lowered into 32-bit operations at codegen time, which is too late for the lowered instructions to be visible by the SWSB pass, so it's unable to insert the correct cross-pipeline synchronization annotations on XeHP+ platforms -- To fix that this series gets rid of the codegen-time lowering of those operations and replaces them with some automated infrastructure in the lower_regioning pass, since it's kind of a pain to keep the SWSB pass in perfect sync with the code transformations being done by the code generator -- Instead we want the IR to provide the closest possible representation of the real datatypes of each instruction, and assert-fail from the SWSB pass if there are any remaining 64-bit types on soft-fp64 platforms, since we know the IR must be lying about them.

@pzanoni @llandwerlin @tpalli

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