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nir_to_tgsi: register-allocate temporaries (and fix SSA temp release bugs)

Emma Anholt requested to merge anholt/mesa:ntt-regs into main

For !14130 (merged), and thus for !8044 (merged), I'd like nir_to_tgsi to be able to slot in without reworking the driver's compiler backend, which relies on 1:1 mapping TGSI regs to HW regs.

To do that, I ported brw_vec4_reg_allocate.cpp's live regs pass to work on nir registers, producing a datastructure matching the one we do for NIR SSA defs. I didn't place it in core NIR because it seemed like this would be even less commonly used than the core NIR one for SSA defs (note how etnaviv has a related NIR SSA liveness analysis of its own). Since making it NIR metadata is a bunch of work, I skipped that.

End result of the series:

softpipe:

total temps in shared programs: 563942 -> 374085 (-33.67%)
temps in affected programs: 496722 -> 306865 (-38.22%)

nv40 NIR:

total gpr in shared programs: 111329 -> 92601 (-16.82%)
gpr in affected programs: 74738 -> 56010 (-25.06%)

r300:

total instructions in shared programs: 50517 -> 50520 (<.01%)
instructions in affected programs: 574 -> 577 (0.52%)
total temps in shared programs: 10155 -> 10064 (-0.90%)
temps in affected programs: 2108 -> 2017 (-4.32%)

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