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lima/ppir: implement gl_FragDepth support

Vasily Khoruzhick requested to merge anarsoul/mesa:lima-fragdepth into main

Mali4x0 supports writing depth and stencil from fragment shader and we've been using it quite a while for depth/stencil buffer reload.

The missing part was specifying output register for depth/stencil. To figure it out, I changed reload shader to use register $4 as output and poked RSW bits (or rather consecutive 4 bit groups) until tests that rely on reload started to pass again.

It turns out that register number for gl_FragDepth/gl_FragStencil is in rsw->depth_test and register number for gl_FragColor is in rsw->multi_sample and it's repeated 4 times for some reason (likely for MSAA?)

With this knowledge we now can modify ppir compiler to support multiple store_output intrinsics.

To do that just add destination SSA for store_output to the registers list for regalloc and mark them explicitly as output. Since it's never read in shader we have to take care about it in liveness analysis - basically just mark it alive from the time when it's written to the end of the block. If it's live only in the last instruction, mark it as live_internal, so regalloc doesn't clobber it.

Then just let regalloc do its job, and then copy register number to the shader state and program it in RSW.

The tricky part is gl_FragStencil, since it resides in the same register as gl_FragDepth and with the current design of the compiler it's hard to merge them. However gl_FragStencil doesn't seem to be part of GL2 or GLES2, so we can just leave it not implemented.

Also we need to take care of stop bit for instructions - now we can't just set it in every instruction that stores output, since there may be several outputs. So if there's any store_output instructions in the block just mark that block has a stop, and set stop bit in the last instruction in the block. The only exception is discard - we always need to set stop bit in discard instruction.

Edited by Vasily Khoruzhick

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