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intel/fs: Add support for SLM fence in Gen11

Caio Oliveira requested to merge cmarcelo/mesa:r/icl-barriers into master

Gen11 SLM is not on L3 anymore, so now the hardware has two separate fences. Add a way to control which fence types to use.

At this time, we don't have enough information in NIR to control the visibility of the memory being fenced, so for now be conservative and assume that fences will need a stall. With more information later we'll be able to reduce those.

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