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freedreno/regs: add bit to control continuous clock with 7nm PHYs

Dmitry Baryshkov requested to merge lumag/mesa:dsi-lane-ctrl-hs-req-sel-phy into main

7nm PHYs need another special bit set in DSI_LANE_CTRL to enable continuous DSI clock. Document this bit.

Signed-off-by: Dmitry Baryshkov dbaryshkov@gmail.com

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