ci/radeonsi: Mark a glx_arb_sync_control/timing flake.
I've seen this one happen at least twice today. Log shows something like:
Wallclock time between MSCs 16982.888889us does not match
glXGetMscRateOML 16668.071966us
or
Wallclock time between MSCs 16500.333333us does not match
glXGetMscRateOML 16668.071966us
Incidentally, both runs I've looked into had one run too fast and one run too slow.