anv: insufficient synchronization when importing buffers from VA-API with iHD
Env:
- Device:
TGL
and others - MESA: any recent version (non-Amber)
- VA-API: libva atop Intel
iHD
Flow:
- gem bo allocated from
i915
withX_TILED
tiling forDRM_FORMAT_NV12
- libva imports and fills decoded output
-
anv
imports viaVK_EXT_image_drm_format_modifier
+VK_EXT_external_memory_dma_buf
+VK_FORMAT_G8_B8R8_2PLANE_420_UNORM
- uses Vulkan to do colorspace conversion and blit to a buffer for readback. An example here can be
Android
UI framework withskiavk
backend doing GPU blit and readback for a decoder output surface withVA-API
serving underlying buffers. - barriers are correct (ownership transfer + layout transition)
Result:
- blit output is sometimes half-finished or completely blank
This is about video<->vulkan
interop. Since VA-API
still relies on implicit fencing, the consumer is expected to support waiting on the implicit fence attached to the imported dma-buf upon submission. The entire flow is a bit awkward when it comes to Vulkan explicit synchronization primitives, however, the story is as is until VA-API support explicit fencing.
As a comparison:
- our AMD platform works fine for the same flow with Vulkan atop radv + VA-API atop radeonsi
- our ARM platfrom works fine since the host side is V4L2 so the buffers are ready when passing over
Edited by Yiwei Zhang