For several schedule restrictions, we are checking if the instruction
is using the vpm. So far it was implemented as being a read or a write
of the vpm. But VPM wait (vpmwt) is not a read or a write (it is a
wait until all pending writes finishes). This is relevant to implement
peripheral accesses restrictions, as for some cases where vpm
read|writes are allowed, vpmwt is not.

Fixes:
  dEQP-VK.binding_model.descriptorset_random.sets8.constant.ubolimitlow.sbolimitlow.sampledimglow.outimgtexlow.noiub.nouab.vert.noia.0

On the sim, as it was raising an assert for wrong peripheral access.

v2: simplify v3d_qpu_waits_vpm (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <mesa/mesa!6498>