drm/i915: Bump frame start delay to max

The only time we can safely update single buffered registers
(such as plane/pipe gamma, plane color correction) is between
start of vblank and frame start. At frame start the pipe will
already start to process the pixels for the subsequent frame
and so any register update after that point is likely to cause
visible artifacts.

Currently we have configured the frame start delay to its minimum
value (~1 scanline). Bump it to the max (~4 scanlines) to give us
a bit more time to update those registers without causing visible
artifacts.

Unfortunately the gamma LUTs can be rather huge so this is still
not enough time in many so probably not worth the hassle. Also
frame start delay is generally tagged as "test mode" in the spec
so not sure we should be extending it at all.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>