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Commit 989412ed authored by Esha Bharadwaj's avatar Esha Bharadwaj Committed by Dmitry Baryshkov
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drm/msm/dpu: Add CWB entry to catalog for SM8650

parent 835d1062
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...@@ -352,6 +352,25 @@ static const struct dpu_wb_cfg sm8650_wb[] = { ...@@ -352,6 +352,25 @@ static const struct dpu_wb_cfg sm8650_wb[] = {
}, },
}; };
static const struct dpu_cwb_cfg sm8650_cwb[] = {
{
.name = "cwb_0", .id = CWB_0,
.base = 0x66200, .len = 0x8,
},
{
.name = "cwb_1", .id = CWB_1,
.base = 0x66600, .len = 0x8,
},
{
.name = "cwb_2", .id = CWB_2,
.base = 0x7E200, .len = 0x8,
},
{
.name = "cwb_3", .id = CWB_3,
.base = 0x7E600, .len = 0x8,
},
};
static const struct dpu_intf_cfg sm8650_intf[] = { static const struct dpu_intf_cfg sm8650_intf[] = {
{ {
.name = "intf_0", .id = INTF_0, .name = "intf_0", .id = INTF_0,
...@@ -449,6 +468,8 @@ const struct dpu_mdss_cfg dpu_sm8650_cfg = { ...@@ -449,6 +468,8 @@ const struct dpu_mdss_cfg dpu_sm8650_cfg = {
.merge_3d = sm8650_merge_3d, .merge_3d = sm8650_merge_3d,
.wb_count = ARRAY_SIZE(sm8650_wb), .wb_count = ARRAY_SIZE(sm8650_wb),
.wb = sm8650_wb, .wb = sm8650_wb,
.cwb_count = ARRAY_SIZE(sm8650_cwb),
.cwb = sm8650_cwb,
.intf_count = ARRAY_SIZE(sm8650_intf), .intf_count = ARRAY_SIZE(sm8650_intf),
.intf = sm8650_intf, .intf = sm8650_intf,
.vbif_count = ARRAY_SIZE(sm8650_vbif), .vbif_count = ARRAY_SIZE(sm8650_vbif),
......
...@@ -613,6 +613,16 @@ struct dpu_wb_cfg { ...@@ -613,6 +613,16 @@ struct dpu_wb_cfg {
enum dpu_clk_ctrl_type clk_ctrl; enum dpu_clk_ctrl_type clk_ctrl;
}; };
/*
* struct dpu_cwb_cfg : MDP CWB mux instance info
* @id: enum identifying this block
* @base: register base offset to mdss
* @features bit mask identifying sub-blocks/features
*/
struct dpu_cwb_cfg {
DPU_HW_BLK_INFO;
};
/** /**
* struct dpu_vbif_dynamic_ot_cfg - dynamic OT setting * struct dpu_vbif_dynamic_ot_cfg - dynamic OT setting
* @pps pixel per seconds * @pps pixel per seconds
...@@ -815,6 +825,9 @@ struct dpu_mdss_cfg { ...@@ -815,6 +825,9 @@ struct dpu_mdss_cfg {
u32 dspp_count; u32 dspp_count;
const struct dpu_dspp_cfg *dspp; const struct dpu_dspp_cfg *dspp;
u32 cwb_count;
const struct dpu_cwb_cfg *cwb;
/* Add additional block data structures here */ /* Add additional block data structures here */
const struct dpu_perf_cfg *perf; const struct dpu_perf_cfg *perf;
......
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