- Dec 21, 2017
-
-
Emil Velikov authored
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
-
Emil Velikov authored
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
-
- Dec 18, 2017
-
-
Meson is not supported in Mesa 17.3. Cc: "17.3" <mesa-stable@lists.freedesktop.org> Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Acked-by: Emil Velikov <emil.velikov@collabora.com>
-
anv merges the tess info correctly, but radv wasn't doing this. This fixes hangs in dEQP-VK.tessellation.winding.default_domain.hlsl_triangles_ccw Fixes: 60fc0544 (radv/pipeline: handle tessellation shader compilation) Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 1bdeac54) Conflicts: src/amd/vulkan/radv_pipeline.c
-
Emil Velikov authored
Meson is explicitly disabled in branch. Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
-
Emil Velikov authored
Meson is explicitly disabled in branch. Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
-
We did not set the layer correctly for the dst, as we would keep using the base layer. Same for the source image. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102710 CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit b42e106d)
-
This was undefined yet harmless behavior in LLVM. Not anymore - it causes a hang now. Cc: 17.3 <mesa-stable@lists.freedesktop.org> Tested-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit 35c3cbad)
-
- Dec 15, 2017
-
-
Emil Velikov authored
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Andres Gomez <agomez@igalia.com> (cherry picked from commit 5d03a686)
-
Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit 513d7ffa)
-
(cherry picked from commit 6a353479) Squashed with: util: Use preprocessor correctly Fixes: 6a353479 ("util: Assume little endian in the absence of platform-specific handling") (cherry picked from commit b8cbad62) Squashed with: util: Just give up and define PIPE_ARCH_LITTLE_ENDIAN on MSVC MSVC doesn't support #warning?! Getting really tired of this. (cherry picked from commit 67676125) Squashed with: util: Also include endian.h on cygwin If u_endian.h can't determine the endianess, the default behaviour in sha1.c is to build for big-endian Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 2c62ccb1)
-
- Dec 14, 2017
-
-
We failed to take the start into account for how many vertices to draw in this round, so we would end up decrementing count below 0, which as an unsigned number meant we would loop until the CLs soon ran out of space. When I wrote the code I was thinking about how to use the previously emitted shader state (no index bias baked into the elements) by emitting up to 65535 and then only re-emitting with bias for the second wround, but that doesn't work if the start is over 65535. Instead, just delay emitting shader state until we get into the drawarrays GFXH-515 loop and always bake the bias in when we're doing the workaround. (cherry picked from commit 84ab48c1)
-
GLSL shaders can access the normal scale factor with the built-in gl_NormalScale. Mesa's modelspace lighting optimization uses a different normal scale factor than defined in the spec. We have to take care not to use this factor for gl_NormalScale. Mesa already defines two seperate states: state.normalScale and state.internal.normalScale. The first is used by the glsl compiler while the later is used by the fixed function T&L pipeline. Previously the only difference was some component swizzling. With this commit state.normalScale always uses the normal scale factor for eyespace lighting. Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit c3ee464d)
-
spotExponent and spotCosCutoff were swapped in the gl_builtin_uniform_element struct. Now the order matches across gl_builtin_uniform_element, glsl_struct_field and the spec. Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit 9bdb5457)
-
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 4b1e70cc)
-
We never supported it. Missed during copy and pasting. Fixes: 17201a2e "radv: port to using updated anv entrypoint/extension generator." Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit 4eb0dca4) [Emil Velikov: trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/amd/vulkan/radv_extensions.py
-
This function is only used in two places: 1. VMware driver, but only for HUD reporting 2. st/nine state tracker, used for texture memory accounting Fixes: a69efa94 ("util: add new util_resource_size() function in u_resource.[ch]") Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Charmaine Lee <charmainel@vmware.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit dde8309c)
-
At this point dc_job->cache_item_metadata.keys always equals NULL, so call to free() is useless Fixes: b86ecea3 ("util/disk_cache: write cache item metadata to disk") Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit b2490a32)
-
This fixes a crash in: KHR-GL45.enhanced_layouts.xfb_block_stride Fixes: 08225179 "glsl: add helper to process xfb qualifiers during linking" Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 9d53cccc)
-
The flag is on the pipe_resource, not the r600_resource. I don't see an obvious bug related to this, but it could potentially lead to suboptimal placement of some resources. Fixes: a4158743 ("gallium/radeon: add R600_RESOURCE_FLAG_UNMAPPABLE") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (cherry picked from commit 5e2962c9)
-
Fixes: 61d7676d "nvc0/ir: add support for 64-bit shift lowering on SM20/SM30" Fixes fs-shift-scalar-by-scalar.shader_test from piglit for the current set-up: uniform int64_t ival -0x7dfcfefbdf6536ff # bit pattern: 0x82030104209ac901 uniform uint64_t uval 0x1400000085010203 uniform int shl 36 uniform int shr 36 uniform int64_t iexpected_shl 0x09ac901000000000 uniform int64_t iexpected_shr -0x7dfcff0 # bit pattern: 0xfffffffff8203010 uniform uint64_t uexpected_shl 0x5010203000000000 uniform uint64_t uexpected_shr 0x0000000001400000 draw rect ortho 12 0 4 4 Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 9bee1216)
-
deviceName string is declared, assigned and freed but actually never used in dri3_create_screen() function. Fixes: 2d946015 ("Add DRI3+Present loader") Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit d5559292)
-
nir_validate.c's #endif already had the correct NDEBUG comment Fixes: dcb1acde "nir/validate: Only build in debug mode" Fixes: 9ff71b64 "i965/nir: Validate that NIR passes call nir_metadata_preserve()" Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 7b85b9b8) [Emil Velikov: trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/compiler/nir/nir.h
-
Environment variable KNOB_MAX_WORKER_THREADS allows the user to override default thread creation and thread binding. Previous commit to adjust linux cpu topology caused setting this KNOB to bind all threads to a single core. This patch restores correct functionality of override. Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com> (cherry picked from commit 709f5bdc)
-
We use _mesa_warning() everywhere else in this code. Change requested by Rick Irons of Mathworks. CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 7a460638)
-
Cc: 17.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit bf0904e3)
-
There is no chain, so checking the length ends with a SEGFAULT. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103579 Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit b926da24) [Emil Velikov: trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/compiler/spirv/vtn_variables.c
-
VCE processing IBs starts from session and task info at first level, other commands processed subsequently. The task info for destroy is embedded to destroy command, resulting that feedback command is not properly procoessed. This is causing kernel spin VM fault messages on Polaris and Vega10 card when running ends at encode application. The fix is also verified on VCE physical mode card. Signed-off-by: Leo Liu <leo.liu@amd.com> Cc: mesa-stable@lists.freedesktop.org Acked-by: Christian König <christian.koenig@amd.com> (cherry picked from commit 6d74cb25)
-
Power8, Power8NV, and Power9 are supported on an equal footing with X86. Cc: "17.2" "17.3" <mesa-stable@lists.freedesktop.org> Signed-off-by: Ben Crocker <bcrocker@redhat.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> [Eric: changed formatting, reworded a bit (with Ben's ack)] Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit 060eb314)
-
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104119 CC: <mesa-stable@lists.freedesktop.org> CC: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 947470d1)
-
Allows apps to determine the LLVM version so that they can decide whether or not to enable workarounds for LLVM issues. Signed-off-by: Alex Smith <asmith@feralinteractive.com> Cc: "17.2 17.3" <mesa-stable@lists.freedesktop.org> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (cherry picked from commit 8fda98c4)
-
We only handled unpacking for GL_DEPTH_STENCIL formats. Cemu was hitting _mesa_problem() for an unsupported format in _mesa_unpack_float_32_uint_24_8_depth_stencil_row(), because the format was depth-only, rather than depth-stencil. Cc: "13.0 12.0" <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94739 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103966 Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (cherry picked from commit 8705ed13)
-
This helps avoid compiler warningss in the next commit - everything was initialized, but it wasn't obvious to static analysis. Suggested-by: Tapani Pälli <tapani.palli@intel.com> (cherry picked from commit d6d16c02)
-
If an array is accessed within an if block, then currently it is not known whether the value in the address register is involved in the evaluation of the if condition, and converting the if condition may actually result in out-of-bounds array access. Consequently, if blocks that contain indirect array access should not be converted. Fixes piglits on r600/BARTS: spec/glsl-1.10/execution/variable-indexing/ vs-output-array-float-index-wr vs-output-array-vec3-index-wr vs-output-array-vec4-index-wr Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104143 Signed-off-by: Gert Wollny <gw.fossdev@gmail.com> Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 6c268ea7)
-
Cc: 17.3 <mesa-stable@lists.freedesktop.org> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 010214b4) [Emil Velikov: s/sscreen/rscreen/] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/gallium/drivers/radeon/r600_texture.c
-
Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 5e805cc7)
-
- Dec 08, 2017
-
-
Emil Velikov authored
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
-
Emil Velikov authored
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
-
Emil Velikov authored
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
-
- Dec 04, 2017
-
-
Emil Velikov authored
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
-