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ppir register spilling

Erico Nunes requested to merge enunes/mesa-lima:lima-18.3-regspill into lima-18.3

This implements register spilling for ppir. That is, storing some values in memory as temporaries for when the number of available pp registers is not enough. This version of the spilling code is not fully optimal but should be a working implementation. Hopefully, spilling should be left as a last resource and effort is best spend optimizing other parts of ppir rather than in optimizing the use of temporaries.

The strategy for spilling is to find the most long lived register during the program and spill it, hoping that the number of spilled registers is kept to a minimum. Then, for each use of the chosen register, the register allocator will insert instructions to load the value from memory before using, and in case of a write operation, insert another instruction to store it afterwards. Many of these operations might not be absolutely necessary, but instructions are inserted anyway in order to keep the spilling algorithm simpler. Also, registers are always stored as vec4 in memory even if their use is not 4 components, again to keep the algorithm for spilling simpler.

As a prerequisite, the patch series also adds support for instructions for loading and storing temporaries.

This code also adds the initialization of the stack address fields in the command stream, to be used as storage for the temporary values. That part of the code was based on observation of what the blob does.

This code has been tested with a debug patch that forces spilling regardless of whether the mesa register allocator succeeded or not. It was therefore possible to test multiple spilling iterations and it seems to work. Also, the shader shipped in the gbm-surface-render-two gfx example requires the spilling routine and renders successfully.

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