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Eric Engestrom authored
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They are u64. Fixes deadlock in dEQP-VK.wsi.xcb.present_id_wait.wait.past_no_timeout. Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no> Fixes: 9bffd81f ("vulkan: Add common implementations of vkQueueSubmit and vkQueueWaitIdle") Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <mesa/mesa!19951> (cherry picked from commit f2e535e4)
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 6d9ae6ec ("intel: add a new intrinsic to get the shader stage from bindless shaders") Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com> Part-of: <mesa/mesa!19948> (cherry picked from commit 99dcdf4d)
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Fixes a number of CTS patterns on DG2 : - dEQP-VK.dynamic_rendering.primary_cmd_buff.random* - dEQP-VK.draw.*secondary_cmd* - dEQP-VK.dynamic_rendering.*secondary_cmd* - dEQP-VK.geometry.*secondary_cmd_buffer - dEQP-VK.multiview.*secondary_cmd* Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 9c1c1888 ("intel/fs: put scratch surface in the surface state heap") Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <mesa/mesa!19946> (cherry picked from commit 9bb055ff)
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Similar to anv_address Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 9c1c1888 ("intel/fs: put scratch surface in the surface state heap") Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <mesa/mesa!19946> (cherry picked from commit 20e8e1eb)
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The initial implementation is a pretty big hammer. Implement the HW recommendation to minimize cases in which we need a fence. This improves by 10FPS on some of the Sascha Willems RT demos. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 6031ad4b ("intel/fs: Add Wa_22013689345") Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <mesa/mesa!19322> (cherry picked from commit 94563751)
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static constexpr const 'value' is replaced by static function in all type_char template specializations to avoid the following building errors happening with clang 6 /home/utente/pie-x86_kernel/prebuilts/clang/host/linux-x86/clang-4691093/bin/ld.lld: error: undefined symbol: r600::type_char<r600::ExportInstr>::value >>> referenced by sfn_scheduler.cpp >>> sfn_sfn_scheduler.cpp.o:(bool r600::BlockSheduler::collect_ready_type<r600::ExportInstr>(std::__1::list<r600::ExportInstr*, std::__1::allocator<r600::ExportInstr*> >&, std::__1::list<r600::ExportInstr*, std::__1::allocator<r600::ExportInstr*> >&)) in archive src/gallium/drivers/r600/libr600.a ... /home/utente/pie-x86_kernel/prebuilts/clang/host/linux-x86/clang-4691093/bin/ld.lld: error: undefined symbol: r600::type_char<r600::RatInstr>::value >>> referenced by sfn_scheduler.cpp >>> sfn_sfn_scheduler.cpp.o:(bool r600::BlockSheduler::collect_ready_type<r600::RatInstr>(std::__1::list<r600::RatInstr*, std::__1::allocator<r600::RatInstr*> >&, std::__1::list<r600::RatInstr*, std::__1::allocator<r600::RatInstr*> >&)) in archive src/gallium/drivers/r600/libr600.a clang-6.0: error: linker command failed with exit code 1 (use -v to see invocation) Cc: "22.2" "22.3" mesa-stable Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!19873> (cherry picked from commit e74d989a)
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It should be emitted right before s_endpgm. Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <mesa/mesa!19931> (cherry picked from commit ce11c064)
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This was missing but it might hang if streamout is used only in secondary command buffers. Found by inspection. Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!19801> (cherry picked from commit c9f0b7b0)
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If a shader has XFB outputs but the application never enables streamout in runtime (no buffers bound and no begin/end pair), we have to disable it in the shader by emitting buffer size as 0. It's also still needed to remember that the cmdbuf needs GDS/GDS OA BOs, so move this at pipeline bind time instead. Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!19801> (cherry picked from commit 3189be24)
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A buffer size as 0 acts like if streamout is disabled with NGG. Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!19801> (cherry picked from commit 6a2bcce8)
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Otherwise, it's possible to increase counters if a shader has XFB but the application paused it. Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!19801> (cherry picked from commit 5b609491)
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The NGG streamout lowering pass allocates space for all outputs which means we have to align our computation. Otherwise, the maximum number of vertices is incorrect and we end up by reaching the maximum allowed LDS size. This code could be shared instead of being duplicated but that's for later. Fixes some transform feedback tests with Zink and RADV_PERFTEST=ngg_streamout on GFX10.3. Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!19801> (cherry picked from commit ba81dcf9)
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The number of shader outputs should only be considered when the shader has XFB, otherwise we are overallocating LDS. fossils-db (GFX1100): Totals from 16602 (12.31% of 134913) affected shaders: LDS: 17000448 -> 8500224 (-50.00%) Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!19801> (cherry picked from commit 499abeba)
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Fixes e.g. 'Unhandled ALU op: extract_u16' seen with deqp on gc7000. Cc: 22.3 mesa-stable Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Part-of: <mesa/mesa!19776> (cherry picked from commit e244b0f8)
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Closes: #7652 Fixes: 45a111c2 ("nir/opt_algebraic: Fuse c - a * b to FMA") Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Part-of: <mesa/mesa!19776> (cherry picked from commit 7d78fe4a)
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This might fix some window system issues. Fixes: 3da170fa - glthread: change when glFlush flushes asynchronously Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <mesa/mesa!19809> (cherry picked from commit d8719587)
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This fixes a longstanding bug in the interaction between TS and a write mapping. The write does not update TS regardless of the way the update is done. Update via etna_copy_resource would just set the target ts_valid to false without actually writing back any dirty TS to the resource. Writes via the CPU would update the resource, but keep ts_valid at true even if the tile status may now not match the actually written tiles of the resource anymore. Fix this by writing back a dirty TS to the target resource if needed before updating the level with the write data. Always invalidate TS, even when the update is done by the CPU. Cc: mesa-stable Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Part-of: <mesa/mesa!19846> (cherry picked from commit 0fb81352)
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Fixing a typo :( Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 507a86e1 ("anv: ensure CPS is initialized when KHR_fragment_shading_rate is disabled") Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!19922> (cherry picked from commit f7d6c6e1)
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The entrypoint needs to exist but we don't need to do anything with it. Fixes: 13c422e1 ("anv: toggle on EXT_extended_dynamic_state3") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!19817> (cherry picked from commit 9cec1ed5)
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Fixes: 13c422e1 ("anv: toggle on EXT_extended_dynamic_state3") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!19817> (cherry picked from commit 182aa9eb)
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Fixes: 13c422e1 ("anv: toggle on EXT_extended_dynamic_state3") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!19817> (cherry picked from commit b172fd62)
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We need to set CPS_MODE_NONE when no per coarse pixel dispatch. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 231651fd ("anv: implement VK_KHR_fragment_shading_rate") Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <mesa/mesa!19867> (cherry picked from commit 507a86e1)
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We missed a couple of restriction leading to inconsistent 3d pipeline state. It is mostly noticeable when doing a multiple sample dispatch as the verify first 3d operation. Cc: mesa-stable Closes: mesa/mesa#7531 Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <mesa/mesa!19867> (cherry picked from commit 62f12c2d)
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Consider the loop: float i = 0.0; while (true) { if (i != 0.0) break; i = i + 1.0; } This loop clearly executes exactly one time. Some trickery is necessary to handle cases where the initial loop value is very large and the increment is, by comparison, very small. From the fenu_once test case, float i = -604462909807314587353088.0; while (true) { if (i != -604462909807314587353088.0) break; i = i + 36028797018963968.0; } This loop should also execute exactly once, but this is much more challenging to calculate due to precision issues. Going towards smaller magnitude (i.e., adding a small positive value to a large negative value) requires a smaller delta to make a difference than going towards a larger magnitude. For this reason, -604462909807314587353088.0 + 36028797018963968.0 != -604462909807314587353088.0, but -604462909807314587353088.0 + -36028797018963968.0 == -604462909807314587353088.0. Math class is tough. No changes in shader-db or fossil-db. v2: Fix major bug in checking result of the eval_const_binop(nir_op_feq, ...) discovered while developing fneu_once_easy unit test. Fix a typo in the comment just above that. Add fneu_once_easy test. v3: Skip the iteration count adjustment tests for nir_op_fenu and nir_op_ine. Since the iteration count is either 1 or unknown, all this function can do is add numerical error. Add fenu_once tests. v4: Change the initial value in the fneu_once test from large positive to large negative. Change check in get_iteration from nir_op_fsub to nir_op_fadd. Both changes from discussion with M Henning. Also add some more explanation in fneu_once. v5: Rename test cases. Fixes: 6772a17a ("nir: Add a loop analysis pass") Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Part-of: <mesa/mesa!19732> (cherry picked from commit f75c83c4)
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I discovered this problem because adding an algebraic transformation to convert some uge and ult to ieq or ine caused a couple loops to stop unrolling. Consider the loop: uint i = 0; while (true) { if (i >= 1) break; i++; } This loop clearly executes exactly one time. Note that uge(x, 1) is equivalent to ine(x, 0). Changing the condition to 'if (i != 0)' will also execute exactly one time. In the added test cases, uge_once correctly get an exact loop trip count of 1. Without the changes to nir_loop_analyze.c, the ine_once case detects a maximum loop trip count of zero and does not get an exact loop trip count. No changes in shader-db or fossil-db. v2: Move nir_op_fneu changes to a separate commit. v3: Rename test cases. Fixes: 6772a17a ("nir: Add a loop analysis pass") Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Part-of: <mesa/mesa!19732> (cherry picked from commit d9f01440)
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Apparently some software relies on that and the spec kind of says it's there. Fixes: 20c90fed ("rusticl: added") Reported-by: sobkas Signed-off-by: Karol Herbst <kherbst@redhat.com> Part-of: <mesa/mesa!19872> (cherry picked from commit b51eb98c)
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There seems to be a problem with running firefox by using Xwayland that results in a shared resources being not always tagged as using staging. As a result one process tries to map the resource that was allocated as one that uses staging without actually using the staging resource, and hence the mapped range only accounts for the small region that we have to allocated because a zero-allocation doesn't work, but the application mapping the resource assumes that a properly sized range is mapped, and consequently this results in invalid memory access. To work around this issue disable creating staging for resources that are created by using shared binding. It is not clear to me whether this is the best fix, but it seems to quell the issue. Fixes: c9d99b7e virgl: Fix texture transfers by using a staging resource Related: virgl/virglrenderer#291 Part-of: <mesa/mesa!19655> (cherry picked from commit e496d24c)
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In 4ceaed78 we made scratch surface state allocations part of the internal heap (mapped to STATE_BASE_ADDRESS::SurfaceStateBaseAddress) so that it doesn't uses slots in the application's expected 1M descriptors (especially with vkd3d-proton). But all our compiler code relies on BSS (STATE_BASE_ADDRESS::BindlessSurfaceStateBaseAddress). The additional issue is that there is only 26bits of surface offset available in CS instruction (CFE_STATE, 3DSTATE_VS, etc...) for scratch surfaces. So we need the drivers to put the scratch surfaces in the first chunk of STATE_BASE_ADDRESS::SurfaceStateBaseAddress (hence all the driver changes). Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 4ceaed78 ("anv: split internal surface states from descriptors") Closes: mesa/mesa#7687 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!19727> (cherry picked from commit 9c1c1888)
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Eric Engestrom authored
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Fixes crucible test func.shader.dualsrc_mrt0_undef on polaris10. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Cc: 22.3 mesa-stable Part-of: <mesa/mesa!19806> (cherry picked from commit 3061bc79)
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Fixes crucible tests func.shader.dualsrc_mrt0_undef on navi21 and func.shader.dualsrc_mrt1_undef on polaris10. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Cc: 22.3 mesa-stable Part-of: <mesa/mesa!19806> (cherry picked from commit ea0ae17f)
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Seems some build configurations have problems with VLAs still. Fixes: 97641e5c ("radv: Add ability to override the build id for the cache.") Part-of: <mesa/mesa!19869> (cherry picked from commit 8d37ab6b)
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* load_uniform for sand8_stride is uint32 instead of int32 and its range is 4 instead of 1 as it is counted in bytes. * Now we save and restore constant buffer 1 properly for the ubo used in the blit. We need to take into account that in V3D the first UBO with index 0 is stored on constant buffer 1, because gallium uses internally contant buffer 0 (See for reference commit c8212731) * Removed not needed return. * Added shader information about uniforms, ubos, inputs and outputs. * Fixed typos in the comments. Fixes: 95c4f0f9 "v3d: Enables DRM_FORMAT_MOD_BROADCOM_SAND128 support" Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <mesa/mesa!19639> (cherry picked from commit c82775e3)
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Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!19851> (cherry picked from commit e253729e)
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Found when 16bit vec3 varying with llvm14 (not found when llvm15), one 32bit vec4 slot is filled like this: vec3[0] | undef vec3[1] | undef vec3[2] | undef undef | undef LLVM error is for the elements with undef: %287 = insertelement float %280, half %279, i64 0 After this change, we get: %287 = insertelement <2 x half> %280, half %279, i64 0 Fixes: 279eea5b ("amd/llvm: Transition to LLVM "opaque pointers"") Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!19848> (cherry picked from commit e3b1f26a)
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Signed-off-by: Eric Engestrom <eric@igalia.com> Cc: mesa-stable Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <mesa/mesa!19796> (cherry picked from commit 2b99523a)
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The color outputs must be checked against the number of available color buffers, therefore it is best to sort the color outputs to be on the driver locations before the other FS outputs. Fixes: 79ca456b r600/sfn: rewrite NIR backend Closes: mesa/mesa#7530 Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!19804> (cherry picked from commit be570cd3)
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This reverts commit 35d82ecf. Cc: mesa-stable Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <mesa/mesa!19820> (cherry picked from commit e2dadda3)
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Moving entire chunks of code into a dummy if block is causing issues in some situations. To work around the issue that we tried to fix in 35d82ecf ("nir/lower_shader_calls: put inserted instructions into a dummy block") which is that we cannot cut and past a block of instruction that ends with a jump if there are more instruction behind where we're going to past. We can instead just wraps the jumps into dummy if blocks. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <mesa/mesa!19820> (cherry picked from commit 3686d5a3)
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