- Aug 23, 2023
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Now this is actually doing what I expect. drawoverhead #1 score more than doubles (6091->13375). Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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We need to re-emit all descriptors in this case for correctness. Avoids regressions from the following commit. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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We're staging everything anyway. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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For merging shader states, we'll need to lower sysvals separately for each shader but assign uniforms together for the final merged shader. The easiest way to do that is to decouple the lowering of sysvals to driver uniform reads, from the assignment of driver uniform reads to actual uniform registers. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Less copying needed this way. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Dirty track it. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Instead of just using ~0 as a stub todo. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Not per stage per draw. This is less frequent. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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By uploading textures ahead-of-time, we can upload uniforms ahead-of-time too. This will also allow some overhead shaving optimizations, I guess. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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So we can model the descriptors of each shader stage independently, as required for merged shaders. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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In Vulkan, UBOs are lowered by nir_lower_explicit_io, and the ubo_base_agx sysval is unused (since it doesn't handle descriptor sets). That makes the UBO lowering GL-only and hence belongs with the GL driver rather than the compiler. This lets us delete the ubo_base_agx sysval. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Doing a descriptor crawl with binding tables requires a real binding table in the shader, which won't work for VK or merged shader stages in GL. Instead, let's lower anything that needs a crawl to bindless in the driver, so the compiler code doesn't need to know anything about descriptor binding models. That gets rid of the texture_base_agx sysval, which is problematic when there are multiple descriptor sets worth of textures. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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For agx_nir_lower_texture to lower to a descriptor crawl, the driver needs to make sure the address of the descriptor is available. This means a slightly different code path should be used in the driver. Rather than the drivers needing to know what exactly will be lowered, add a helper in the same file as agx_nir_lower_texture that returns whether descriptor-based lowering will be needed so the driver can act appropriately. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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We want to make the implicit txs in operations explicit before lower_bindings so lower_bindings knows to force bindless. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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These would be inserted by nir_lower_tex anyway, but we shouldn't be relying on that behaviour for the meta shaders when we can just create the correct thing from the start. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Reduces fencing significantly. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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This is the counterpart of get_oq_index for non-occlusion hardware queries. These are not tracked with occlusion queries, since occlusion query allocations are limited, and they are not based on indexing but rather general batch-allocated space. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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For other GPU queries, handled similarly. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Otherwise batch->writer might be non-null. Fixes Piglit occlusion_query_conform (which I think regressed when we added proper syncing). Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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We will soon have other types of queries with non-null writers. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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In preparation for other types of GPU queries. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Yes, this means we now lie to the app. There's nothing more in the spirit of dumb OpenGL features than lying! Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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We will need to do the same flushing dance for non-occlusion GPU queries. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Mistake during IR translation, this is 16-bit in NIR. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Bug fix on its own, and prevents regressions from using bindless more. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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We lower to access to a non-array 2D image, so we need to update the image_array flag when we lower or otherwise we get an incorrect 2D Array store to a 2D image which the hardware doesn't want. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Pedantic. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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We do all the math in pixels and only multiply by the sample count at the end, meaning the layer stride needs to be in terms of pixels (not samples) for correct addressing of multisample array images in our texture lowering. This is particularly used for lowering the multisample array stores we get from eMRT with multisampled layered framebuffers. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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This avoids an unnecessary trip through agx_uncompiled_shader. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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So we can add more shared in the compiler. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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To allow us to debug broken fetches. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Like umul_high. Fixes dEQP-VK.spirv_assembly.instruction.compute.mul_extended.signed_16bit Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Fixes dEQP-VK.spirv_assembly.type.vec3.i8.slessthan_frag Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <mesa/mesa!24847>
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