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  1. Dec 04, 2019
  2. Dec 03, 2019
  3. Nov 27, 2019
    • Samuel Pitoiset's avatar
      radv: fix enabling sample shading with SampleID/SamplePosition · 19573e43
      Samuel Pitoiset authored and Dylan Baker's avatar Dylan Baker committed
      
      When a fragment shader includes an input variable decorated with
      SampleId or SamplePosition, sample shading should be enabled
      because minSampleShadingFactor is expected to be 1.0.
      
      Cc: 19.2, 19.3 <mesa-stable@lists.freedesktop.org>
      Signed-off-by: default avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
      Reviewed-by: default avatarBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
      (cherry picked from commit 86a5fbfd)
      19573e43
    • Dylan Baker's avatar
      VERSION: Bump version for -rc5 · 5a12bc64
      Dylan Baker authored
    • Yevhenii Kolesnikov's avatar
      meson: Fix linkage of libgallium_nine with libgalliumvl · 14acf6fc
      Yevhenii Kolesnikov authored and Dylan Baker's avatar Dylan Baker committed
      Do not link libgallium_nine with libgalliumvl_stub if it's already
      linked with libgalliumvl. Linking with stub leads to "duplicate
      symbol" errors.
      
      Fixes: 6b4c7047
             ("meson: build gallium nine state_tracker")
      Closes: mesa/mesa#2040
      
      
      
      Signed-off-by: default avatarYevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
      Reviewed-by: default avatarDylan Baker <dylan@pnwbakers.com>
      (cherry picked from commit 9af22ccd)
      14acf6fc
    • Bas Nieuwenhuizen's avatar
      radv: Allocate cmdbuffer space for buffer marker write. · 06a95a06
      Bas Nieuwenhuizen authored and Dylan Baker's avatar Dylan Baker committed
      
      Fixes: 946193ae "radv: add support for VK_AMD_buffer_marker"
      Reviewed-by: default avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
      (cherry picked from commit 25bc9102)
      06a95a06
    • Gert Wollny's avatar
      r600: Disable eight bit three channel formats · 2e8af7b3
      Gert Wollny authored and Dylan Baker's avatar Dylan Baker committed
      
      Commit 0899bf55 made some deqp-gles3 tests related to RGB8 PBOs fail
      on R600 because it exposed PIPE_FORMAT_R8G8B8_UNORM and R600 doesn't
      propely handle this. Disabling this format also for buffers fixes the
      issue.
      
      In addition, disabling also the related RGB8 integer formats for buffers
      fixes some deqp-gles3 tests:
      
        dEQP-GLES3.functional.texture.specification.teximage2d_pbo.rgb8ui_cube
        dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8i_2d
        dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8i_cube
        dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8ui_2d
        dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8ui_cube
        dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8i_2d_array
        dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8i_3d
        dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8ui_2d_array
        dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8ui_3d
        dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8i_2d_array
        dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8i_3d
        dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8ui_2d_array
        dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8ui_3d
      
      Fixes: 0899bf55
        st/mesa: Map MESA_FORMAT_RGB_UNORM8 <-> PIPE_FORMAT_R8G8B8_UNORM
      
      Closes #2118
      
      Signed-off-by: default avatarGert Wollny <gert.wollny@collabora.com>
      Reviewed-by: default avatarEric Anholt <eric@anholt.net>
      (cherry picked from commit e41958e3)
      2e8af7b3
    • Timothy Arceri's avatar
      radv: create a fresh fork for each pipeline compile · 5b9decf6
      Timothy Arceri authored and Dylan Baker's avatar Dylan Baker committed
      In order to prevent a potential malicious pipeline tainting our
      secure compile process and interfering with successive pipelines
      we want to create a fresh fork for each pipeline compile.
      
      Benchmarking has shown that simply forking on each pipeline
      creation doubles the total time it takes to compile a fossilize db
      collection. So instead here we fork the process at device creation
      so that we have a slim copy of the device and then fork this
      otherwise idle and untainted process each time we compile a
      pipeline. Forking this slim copy of the device results in only a
      20% increase in compile time vs a 100% increase.
      
      Fixes: cff53da3 ("radv: enable secure compile support")
      (cherry picked from commit f54c4e85)
      5b9decf6
    • Timothy Arceri's avatar
      radv: add a secure_compile_open_fifo_fds() helper · 0b0c500a
      Timothy Arceri authored and Dylan Baker's avatar Dylan Baker committed
      This will be used to create a communication pipe between the user
      facing device and a freshly forked (per pipeline compile) slim copy
      of that device.
      
      We can't use pipe() here because the fork will not be a direct fork
      of the user facing process. Instead we use a previously forked
      copy of the process that was forked at device creation in order to
      reduce the resources required for the fork and avoid performance
      issues.
      
      Fixes: cff53da3 ("radv: enable secure compile support")
      (cherry picked from commit 1663bb1f)
      0b0c500a
    • Timothy Arceri's avatar
      radv: add some infrastructure for fresh forks for each secure compile · 093deac7
      Timothy Arceri authored and Dylan Baker's avatar Dylan Baker committed
      In the following commits we want to be able to fork an existing lightweight
      fork created at device creation time. In order for the user facing process
      to communicate with this new fresh fork we create some members here to hold
      FIFO file descriptors and a unique id.
      
      Here we also add a new fork enum that we use to tell the lightweight
      process to create a fresh fork.
      
      For more information on why we create a fresh fork see the following
      commits.
      
      (cherry picked from commit ef54f15d)
      093deac7
    • Zeb Figura's avatar
      Revert "draw: revert using correct order for prim decomposition." · ba9f8e0f
      Zeb Figura authored and Dylan Baker's avatar Dylan Baker committed
      This reverts commit f97b731c.
      
      Closes: mesa/mesa#250
      
      
      
      Reviewed-by: default avatarRoland Scheidegger <sroland@vmware.com>
      (cherry picked from commit a3c8bc10)
      ba9f8e0f
    • Ian Romanick's avatar
      intel/fs: Disable conditional discard optimization on Gen4 and Gen5 · 85b0bb51
      Ian Romanick authored and Dylan Baker's avatar Dylan Baker committed
      
      The CMP instruction on Gen4 and Gen5 generates one bit (the LSB) of
      valid data and 31 bits of junk.  Results of comparisons that are used as
      Boolean values need to have a fixup applied to generate the proper 0/~0
      values.
      
      Calling fs_visitor::nir_emit_alu with need_dest=false prevents the fixup
      code from being generated.  This results in a sequence like:
      
              cmp.l.f0.0(16)  g8<1>F          g14<8,8,1>F     0x0F  /* 0F */
              ...
              cmp.l.f0.0(16)  g4<1>F          g6<8,8,1>F      0x0F  /* 0F */
      (+f0.1) or.z.f0.1(16) null<1>UD g4<8,8,1>UD     g8<8,8,1>UD
      
      instead of
      
              cmp.l.f0.0(16)  g8<1>F          g14<8,8,1>F     0x0F  /* 0F */
              ...
              cmp.l.f0.0(16)  g4<1>F          g6<8,8,1>F      0x0F  /* 0F */
              or(16) g4<1>UD g4<8,8,1>UD     g8<8,8,1>UD
      (+f0.1) and.z.f0.1(16) null<1>UD g4<8,8,1>UD     1UD
      
      I examined a couple of the shaders hurt by this change, and ALL of them
      would have been affected by this bug. :(
      
      Reviewed-by: default avatarTapani Pälli <tapani.palli@intel.com>
      Closes: mesa/mesa#1836
      Fixes: 0ba9497e ("intel/fs: Improve discard_if code generation")
      
      Iron Lake
      total instructions in shared programs: 8122757 -> 8122957 (<.01%)
      instructions in affected programs: 8307 -> 8507 (2.41%)
      helped: 0
      HURT: 100
      HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
      HURT stats (rel)   min: 0.84% max: 6.67% x̄: 2.81% x̃: 2.76%
      95% mean confidence interval for instructions value: 2.00 2.00
      95% mean confidence interval for instructions %-change: 2.58% 3.03%
      Instructions are HURT.
      
      total cycles in shared programs: 188510100 -> 188510376 (<.01%)
      cycles in affected programs: 76018 -> 76294 (0.36%)
      helped: 0
      HURT: 55
      HURT stats (abs)   min: 2 max: 12 x̄: 5.02 x̃: 4
      HURT stats (rel)   min: 0.07% max: 3.75% x̄: 0.86% x̃: 0.56%
      95% mean confidence interval for cycles value: 4.33 5.71
      95% mean confidence interval for cycles %-change: 0.60% 1.12%
      Cycles are HURT.
      
      GM45
      total instructions in shared programs: 4994403 -> 4994503 (<.01%)
      instructions in affected programs: 4212 -> 4312 (2.37%)
      helped: 0
      HURT: 50
      HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
      HURT stats (rel)   min: 0.84% max: 6.25% x̄: 2.76% x̃: 2.72%
      95% mean confidence interval for instructions value: 2.00 2.00
      95% mean confidence interval for instructions %-change: 2.45% 3.07%
      Instructions are HURT.
      
      total cycles in shared programs: 128928750 -> 128928982 (<.01%)
      cycles in affected programs: 67442 -> 67674 (0.34%)
      helped: 0
      HURT: 47
      HURT stats (abs)   min: 2 max: 12 x̄: 4.94 x̃: 4
      HURT stats (rel)   min: 0.09% max: 3.75% x̄: 0.75% x̃: 0.53%
      95% mean confidence interval for cycles value: 4.19 5.68
      95% mean confidence interval for cycles %-change: 0.50% 1.00%
      Cycles are HURT.
      
      (cherry picked from commit e51eda99)
      85b0bb51
    • Yevhenii Kolesnikov's avatar
      glsl: Enable textureSize for samplerExternalOES · 9cd69861
      Yevhenii Kolesnikov authored and Dylan Baker's avatar Dylan Baker committed
      From OES_EGL_image_external_essl3
      
      Closes: mesa/mesa#1901
      
      
      
      Signed-off-by: default avatarYevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
      Reviewed-by: default avatarMarek Olšák <marek.olsak@amd.com>
      Acked-by: default avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      9cd69861
    • Dave Airlie's avatar
      llvmpipe/ppc: fix if/ifdef confusion in backport. · c694d3c5
      Dave Airlie authored and Dylan Baker's avatar Dylan Baker committed
      
      Fixes: 32aba91c (llvmpipe: use ppc64le/ppc64 Large code model for JIT-compiled shaders)
      Reviewed-by: default avatarDylan Baker <dylan@pnwbakers.com>
      c694d3c5
    • Hyunjun Ko's avatar
      freedreno/ir3: fix printing output registers of FS. · 6477084c
      Hyunjun Ko authored and Dylan Baker's avatar Dylan Baker committed
      
      Fixes: cea39af2 ("freedreno/ir3: Generalize ir3_shader_disasm()")
      
      Reviewed-by: default avatarRob Clark <robdclark@gmail.com>
      (cherry picked from commit d0f38394)
      6477084c
    • Alejandro Piñeiro's avatar
      v3d: adds an extra MOV for any sig.ld* · 37ded706
      Alejandro Piñeiro authored and Dylan Baker's avatar Dylan Baker committed
      
      Specifically when we are in non-uniform control flow, as we would need
      to set the condition for the last instruction. If (for example) a
      image atomic load stores directly their value on a NIR register,
      last_inst would be a nop, and would fail when set the condition.
      
      Fixes piglit test:
      spec/glsl-es-3.10/execution/cs-ssbo-atomic-if-else-2.shader_test
      
      Fixes: 6281f26f ("v3d: Add support for shader_image_load_store.")
      
      v2: (Changes suggested by Eric Anholt)
         * Cover all sig.ld* signals, not just ldunif and ldtmu, as all of
           them have the same restriction.
         * Update comment explaining why we add a MOV in that case
         * Tweak commit message.
      
      v3:
         * Drop extra set of parens (Eric)
         * Add missing ld signal to is_ld_signal to fix shader-db regression.
      
      Reviewed-by: default avatarEric Anholt <eric@anholt.net>
      (cherry picked from commit b4bc59e3)
      37ded706
    • José María Casanova Crespo's avatar
      v3d: Fix predication with atomic image operations · 9d1b1968
      José María Casanova Crespo authored and Dylan Baker's avatar Dylan Baker committed
      
      Fixes dEQP test:
      dEQP-GLES31.functional.synchronization.inter_call.with_memory_barrier.image_atomic_multiple_interleaved_write_read
      
      Fixes piglit test:
      spec/glsl-es-3.10/execution/cs-image-atomic-if-else.shader_test
      
      Fixes: 6281f26f ("v3d: Add support for shader_image_load_store.")
      
      Reviewed-by: default avatarAlejandro Piñeiro <apinheiro@igalia.com>
      Reviewed-by: default avatarEric Anholt <eric@anholt.net>
      (cherry picked from commit d9830551)
      9d1b1968
    • Bas Nieuwenhuizen's avatar
      radv: Do not change scratch settings while shaders are active. · 79521963
      Bas Nieuwenhuizen authored and Dylan Baker's avatar Dylan Baker committed
      
      When the scratch ringbuffer settings are changed, the shader unit has
      to be idle or we will have shaders using old and new settings.
      
      That combination is not supported on the HW (likely the offset is
      ringbuffer idx * WAVESIZE * 1024).
      
      CC: <mesa-stable@lists.freedesktop.org>
      Reviewed-by: default avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
      (cherry picked from commit 4eb2a1dc)
      79521963
    • Eric Engestrom's avatar
      vulkan: delete typo'd header · abccd999
      Eric Engestrom authored
      Two files exist in that directory:
      - vulkan_xlib_randr.h
      - vulkan_xlib_xrandr.h
      
      Both were imported in 205c2715 ("vulkan: Update the XML and
      headers to 1.1.70") with identical contents (ie. the
      VK_EXT_acquire_xlib_display extension), but the former was never
      included anywhere and can't be found upstream [1], while the latter is
      included in vulkan.h and found upstream.
      
      [1] https://github.com/KhronosGroup/Vulkan-Headers/tree/master/include/vulkan
      
      
      
      Fixes: 205c2715 ("vulkan: Update the XML and headers to 1.1.70")
      Signed-off-by: default avatarEric Engestrom <eric.engestrom@intel.com>
      Acked-by: default avatarJason Ekstrand <jason@jlekstrand.net>
      (cherry picked from commit 344859c3)
      abccd999
  4. Nov 20, 2019
    • Dylan Baker's avatar
      VERSION: bump for 19.3.0-rc4 · cd736de7
      Dylan Baker authored
    • Faith Ekstrand's avatar
      anv: Stop bounds-checking pushed UBOs · b7ab6e94
      Faith Ekstrand authored
      
      The bounds checking is actually less safe than just pushing the data.
      If the bounds checking actually ever kicks in and it's not on the last
      UBO push range, then the shrinking will cause all subsequent ranges to
      be pushed to the wrong place in the GRF.  One of the behaviors we
      definitely don't want is for OOB UBO access to result in completely
      unrelated UBOs returning garbage values.  It's safer to just push the
      UBOs as-requested.  If we're really concerned about robustness, we can
      emit shader code to do bounds checking which should be stupid cheap (a
      CMP followed by SEL).
      
      Cc: mesa-stable@lists.freedesktop.org
      Reviewed-by: default avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
      b7ab6e94
    • Brian Paul's avatar
      Call shmget() with permission 0600 instead of 0777 · addf63db
      Brian Paul authored and Dylan Baker's avatar Dylan Baker committed
      
      A security advisory (TALOS-2019-0857/CVE-2019-5068) found that
      creating shared memory regions with permission mode 0777 could allow
      any user to access that memory.  Several Mesa drivers use shared-
      memory XImages to implement back buffers for improved performance.
      
      This path changes the shmget() calls to use 0600 (user r/w).
      
      Tested with legacy Xlib driver and llvmpipe.
      
      Cc: mesa-stable@lists.freedesktop.org
      Reviewed-by: default avatarKristian H. Kristensen <hoegsberg@google.com>
      (cherry picked from commit 02c3dad0)
      addf63db
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