- Apr 03, 2018
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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- Mar 29, 2018
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Juan A. Suárez authored
stable: Explicit 18.0 only nominations. Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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- Mar 28, 2018
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When an if nesting inside anouther if is optimised away we can end up with a loop terminator and following block that looks like this: if ssa_596 { block block_5: /* preds: block_4 */ vec1 32 ssa_601 = load_const (0xffffffff /* -nan */) break /* succs: block_8 */ } else { block block_6: /* preds: block_4 */ /* succs: block_7 */ } block block_7: /* preds: block_6 */ vec1 32 ssa_602 = phi block_6: ssa_552 vec1 32 ssa_603 = phi block_6: ssa_553 vec1 32 ssa_604 = iadd ssa_551, ssa_66 The problem is the phis. Loop unrolling expects the last block in the loop to be empty once we splice the instructions in the last block into the continue branch. The problem is we cant move phis so here we lower the phis to regs when preparing the loop for unrolling. As it could be possible to have multiple additional blocks/ifs following the terminator we just convert all phis at the top level of the loop body for simplicity. We also add some comments to loop_prepare_for_unroll() while we are here. Fixes: 51daccb2 "nir: add a loop unrolling pass" Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105670 (cherry picked from commit 629ee690)
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This is supposed to have both BASE and COMPONENT but num_indices was inadvertantly set to 1. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit cc3a88e8)
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commit 03dd9a88 introduced per surface queues, but the display_sync for swrast_commit_backbuffer remained on the old queue. This is likely to break when dispatching the correct queue at the top of function (which can't dispatch the sync callback we're waiting for). The easiest known reproduction case is running weston-subsurfaces under weston --use-pixman Signed-off-by: Derek Foreman <derekf@osg.samsung.com> Reviewed-by: Daniel Stone <daniels@collabora.com> (cherry picked from commit aa18a635)
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Just checking for 2 jumps is not enough to be sure we can do a complex loop unroll. We need to make sure we also have also found 2 loop terminators. Without this we were attempting to unroll a loop where the second jump was nested inside multiple ifs which loop analysis is unable to detect as a terminator. We ended up splicing out the first terminator but failed to actually unroll the loop, this resulted in the creation of a possible infinite loop. Fixes: 646621c6 "glsl: make loop unrolling more like the nir unrolling path" Tested-by: Gert Wollny <gw.fossdev@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105670 (cherry picked from commit 56b86739)
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Juan A. Suárez authored
fixes: The commit fixes earier commits 83d4a5d5, b2f2236d and c62cf1f1 which did not land in branch. Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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v2: Add Fixes tag. (Lionel) Fixes: e50d4807 ("anv: Compile TCS/TES shaders.") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 318073ce)
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Juan A. Suárez authored
fixes: The commit requires earlier commits b358e0e6 and b2653007 which did not land in branch. Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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Juan A. Suárez authored
Together with: cherry-ignore: radv: mark all tess output for an indirect access. fixes: The commits require earlier commits 2deb8220 and b2653007 which did not land in branch. Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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A recent commit (see below) triggered some cases where conditional modifier propagation and dead code elimination would cause a MAD instruction like the following to be generated: mad.l.f0 null, ... Matt pointed out that fs_visitor::fixup_3src_null_dest() fixes cases like this in the scalar backend. This commit basically ports that code to the vec4 backend. NOTE: I have sent a couple tests to the piglit list that reproduce this bug *without* the commit mentioned below. This commit fixes those tests. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Tapani Pälli <tapani.palli@intel.com> Cc: mesa-stable@lists.freedesktop.org Fixes: ee63933a ("nir: Distribute binary operations with constants into bcsel") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105704 (cherry picked from commit 91225cb3)
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This seems more correct to me, since if we have an array of floats they'll be vec4 aligned, and if we do af[2], we want the const index to increase by 2 slots in the non compact case. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464 Fixes: 94f95919 (radv/ac: add support for TCS/TES inputs/outputs.) Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit f9de2d40) [Juan A. Suarez: apply patch in ac_nir_to_llvm.c] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/amd/vulkan/radv_nir_to_llvm.c
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This is a terrible hack but it fixes CTS regressions. It's still incredibly unclear exactly what is going wrong in the hardware to cause this to be an issue so this isn't a good fix by any means. However, it does fix tests so there is that. Fixes: fb0e9b51 "i965: Track the depth and render caches separately" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103746 Acked-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 8379bff6)
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With some sets of optimization flags, GCC will generate warnings like this: src/mesa/main/texparam.c:2327:27: warning: ‘*((void *)&ip+12)’ may be used uninitialized in this function [-Wmaybe-uninitialized] params[3] = ip[3]; ~~^~~ src/mesa/main/texparam.c:2320:16: note: ‘*((void *)&ip+12)’ was declared here GLint ip[4]; ^~ ip is not initialized in cases where a GL error is generated. In these cases, we should *not* write to the user's buffer, so this is actually a bug. I wrote a new piglit test gl-3.0-texparameteri to show this bug. I suspect that Coverity also detected this, but the scan site is currently down. Fixes: c2c50778 "main: Added entry points for glGetTextureParameteriv, Iiv, and Iuiv." Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit def0030e)
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Tested by our OpenCL team. Fixes: 9c499e67 "st/mesa: don't invoke st_finalize_texture & st_convert_sampler for TBOs" Acked-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit db495b89) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/gallium/state_trackers/dri/dri2.c
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Cc: Maxin B. John <maxin.john@gmail.com> Cc: Khem Raj <raj.khem@gmail.com> Cc: Rob Herring <robh@kernel.org> Suggested-by: Jon Turney <jon.turney@dronecode.org.uk> Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Dylan Baker <dylan@pnwbakers.com> Cc: <mesa-stable@lists.freedesktop.org> (cherry picked from commit cbee1bfb) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: Android.common.mk meson.build Squashed with: configure: use AC_CHECK_HEADERS to check for endian.h The currently we use the singular CHECK_HEADER combined with explicit append to the DEFINES variable. That is a legacy misnomer, since it requires us to add $DEFINES to every piece that we build. Using the plural version of the helper sets the HAVE_ macro for us, plus ensures it's passed to the compiler - if config.h is available in there (not in the case of mesa) otherwise on the command line. In hindsight, we should replace all the AC_CHECK_{FUNC,HEADER} instances with the plural version (or even the _ONCE suffixed version) and drop the DEFINES hacks. Fixes: cbee1bfb ("meson/configure: detect endian.h instead of trying to guess when it's available") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105717 Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Eric Engestrom <eric.engestrom@imgtec.com> Tested-by: Clayton Craft <clayton.a.craft@intel.com> (cherry picked from commit 5a75019a)
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On the CI family, firmware requires the destory command have to be the last command in the IB, moving feedback command after destroy is causing issues on CI cards, so we have to keep the previous logic that moves destroy back to the last command. But as the original issue fixed previously, with the newer family like Vega10, feedback command have to be included inside of the task info command along with destroy command. Fixes: 6d74cb25("radeon/vce: move destroy command before feedback command") Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit c4de2f08)
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There was a missing absolute value when checking if the determinant was big enough. Fixes: https://github.com/iXit/Mesa-3D/issues/292 Signed-off-by: Axel Davy <davyaxel0@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit dbc24835)
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Makes the conversion explicit. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=102542 Signed-off-by: Axel Davy <davyaxel0@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit f61e9a95)
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Stateblocks with NINESBT_ALL should track all textures. For better performance they have a faster path which copies all the required. This path was only tracking ps textures. Fixes: https://github.com/iXit/Mesa-3D/issues/303 Signed-off-by: Axel Davy <davyaxel0@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 71eae794)
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Ken suggested that we might be underallocating scratch space on HD 400. Allocating scratch space as though there was actually 8 EUs seems to help with a GPU hang seen on synmark CSDof. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104636 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105290 Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Tested-by: Eero Tamminen <eero.t.tamminen@intel.com> (cherry picked from commit 06e3bd02)
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Previously, thread_count was sent in from the stage after some stage specific calculations. Those stage specific calculations were moved into brw_alloc_stage_scratch, which will allow the shader cache to also use the same calculations. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit f9d5a7ad)
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- Mar 21, 2018
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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- Mar 16, 2018
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This reverts commit f314a532. This appears to introduce some blinking textures in UT2004. Not sure exactly what's the root cause because we don't have much information about the issue. Anyway, this was just a micro optimization that actually breaks, at least, one app almost one year later. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105436 Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit f02f1ad1)
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Cc: 18.0 17.3 17.2 <mesa-stable@lists.freedesktop.org> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit 5d0acff3)
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From the spec: "When copying between compressed and uncompressed formats the extent members represent the texel dimensions of the source image and not the destination." However, as per 7b890a36, we must still use the destination image type when clamping the extent so that we copy the correct number of layers for 2D to 3D copies. Fixes: 7b890a36 "radv: Fix vkCmdCopyImage for 2d slices into 3d Images" Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Alex Smith <asmith@feralinteractive.com> Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit fcf267ba)
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The vulkan API is not ideal as it does not allow us have a shared limit. Feral needs 15+6 for one of their games, and I'm not a fan of overcommitting the limits, so increase the number of dynamic uniform buffers to 16. CC: <mesa-stable@lists.freedesktop.org> CC: Alex Smith <asmith@feralinteractive.com> Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 997306c0)
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This is ported from the sb backend, there are some issues with evergreen stacks on the boundary between entries and ALU_PUSH_BEFORE instructions. Whenever we are going to use a push before, we check the stack usage and if we have to use the workaround, then we switch to a separate push. I noticed this problem dealing with some of the soft fp64 shaders, in nosb mode, they are quite stack happy. This fixes all the glitches and inconsistencies I've seen with them Reviewed-by: Roland Scheidegger <sroland@vmware.com> Tested-by: Elie Tournier <elie.tournier@collabora.com> Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 5d4fbc2b) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/gallium/drivers/r600/r600_shader.c
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Ken suggested that we might be underallocating scratch space on HD 400. Allocating scratch space as though there was actually 8 EUs seems to help with a GPU hang seen on synmark CSDof. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 24b41527)
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ALU_EXTENDED needs 4 DWORDS instead of the usual 2, hence if the last ALU clause within a IF-JUMP or ELSE branch is ALU_EXTENDED the target jump offset needs to be adjusted accordingly. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104654 Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Gert Wollny <gw.fossdev@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit c7cadcbd) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/gallium/drivers/r600/r600_shader.c
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Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 75c5d25f) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/amd/common/ac_gpu_info.c Squashed with: radeonsi: add a workaround for GFX9 hang with init_config alignment Fixes: 75c5d25f "radeonsi: align command buffer starting address to fix some Raven hangs" Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 2bdb54bc)
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- Mar 10, 2018
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This fixes hangs on GFXBench 5's Aztec Ruins benchmark. Unfortunately, it regresses OglCSCloth performance by about 10%. There are some ideas for fixing that. The Vulkan driver already emits this stall. Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 55a97db5) Squashed with: i965: Move PIPE_CONTROL defines and prototypes to brw_pipe_control.h. We need to be able to emit PIPE_CONTROLs from genX_state_upload.c, which can't safely include brw_defines.h because it conflicts with genxml. Move all the PIPE_CONTROL related stuff together into a separate header. Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit bfe0f3a7) Squashed with: i965: include brw_pipe_control.h in the tarball Fixes: bfe0f3a7 ("i965: Move PIPE_CONTROL defines and prototypes to brw_pipe_control.h.") Signed-off-by: Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit 526945f7)
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Add support for GL_NUM_SHADING_LANGUAGE_VERSIONS and glGetStringi for GL_SHADING_LANGUAGE_VERSION v2: - Combine similar functionality into _mesa_get_shading_language_version() function. - Change GLSL version return mechanism. v3: - Add return of empty string for GLSL ver 1.10. - Move _mesa_get_shading_language_version() function to src/mesa/main/version.c. v4: - Add OpenGL version check. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104915 Signed-off-by: Andriy Khulap <andriy.khulap@globallogic.com> Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com> Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit a553c54a)
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64-bit pull loads are implemented by emitting 2 separate 32-bit pull load messages, where the second message loads from an offset at +16B. That addition of 16B to the original offset should not alter the original offset register used as source for the pull load instruction though, since the compiler might use that same offset register in other instructions (for example, for other pull loads in the shader code that take that same offset as reference). If the pull load is 32-bit then we only need to emit one message and we don't need to do offset calculations, but in that case the optimizer should be able to drop the redundant MOV. Fixes the following test on Haswell: KHR-GL45.gpu_shader_fp64.fp64.max_uniform_components Reviewed-by: Matt Turner <mattst88@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103007 (cherry picked from commit 8620f7eb)
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103988 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit dc07bb5f)
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LLVM api change. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104381 Tested-by: Laurent Carlier <lordheavym@gmail.com> Reviewed-By: Bruce Cherniak <bruce.cherniak@intel.com> (cherry picked from commit ad218754)
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LLVM 6 changed the API on the fast-math-flags: https://reviews.llvm.org/rL317488 NOTE: This also enables the new flag 'ApproxFunc' to allow for approximations for library functions (sin, cos, ...). I'm not completly convinced, that this is something mesa should do. Signed-off-by: Tobias Droste <tdroste@gmx.de> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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