- Jan 31, 2019
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Emil Velikov authored
Signed-off-by:
Emil Velikov <emil.velikov@collabora.com>
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Function's out variable could be an array dereferenced by an array: func(v[w[i]]); or something more complicated. Copy index in any case. Fixes: 76c27e47 ("glsl: Copy function out to temp if we don't directly ref a variable") Signed-off-by:
Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by:
Timothy Arceri <tarceri@itsqueeze.com> Reviewed-by:
Matt Turner <mattst88@gmail.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 0862929b) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109488 Nominated-by:
Matt Turner <mattst88@gmail.com>
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Otherwise we can end up with IR that looks like this: ( (declare (temporary ) vec4 f@8) (assign (xyzw) (var_ref f@8) (var_ref f) ) (call f16 ((swiz y (var_ref f@8) ))) (assign (xyzw) (var_ref f) (var_ref f@8) ) )) When we really need: (declare (temporary ) float inout_tmp) (assign (x) (var_ref inout_tmp) (swiz y (var_ref f) )) (call f16 ((var_ref inout_tmp) )) (assign (y) (var_ref f) (swiz y (swiz xxxx (var_ref inout_tmp) ))) (declare (temporary ) void void_var) The GLSL IR function inlining code seemed to produce correct code even without this but we need the correct IR for GLSL IR -> NIR to be able to understand whats going on. Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 76c27e47) Nominated-by:
Matt Turner <mattst88@gmail.com>
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- Jan 30, 2019
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We were leaking surfaces because the references taken in etna_set_framebuffer_state weren't being released on context destroy. Instead of just directly releasing those references in etna_context_destroy, use the util_copy_framebuffer_state helper. Take the chance to remove the duplicated buffer references in compiled_framebuffer_state to avoid confusion. The leak can be reproduced with a client that continuously creates and destroys contexts. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Reported-by:
Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by:
Christian Gmeiner <christian.gmeiner@gmail.com> (cherry picked from commit bf1dfcc3) [Emil: resolve trivial conflict - dummy_rt does not exist in branch] Signed-off-by:
Emil Velikov <emil.velikov@collabora.com> Conflicts: src/gallium/drivers/etnaviv/etnaviv_context.c
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The core Mesa with_asm_arch and USE_ARM_ASM flags are disabled for meson cross-builds because of the need to run host binaries on the build system. vc4 doesn't need to do that, so skip with_asm_arch to enable NEON on my cross-builds. Fixes: ebcb4c21 ("meson: Enable VC4's NEON assembly support.") (cherry picked from commit 932ed9c0)
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meson.build:166:21: ERROR: Unknown method "verson_compare" for a string. Fixes: c1efa240 ("meson: Add warnings and errors when using ICC") Signed-off-by:
Vinson Lee <vlee@freedesktop.org> Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> Cc: 18.3 <mesa-stable@lists.freedesktop.org> (cherry picked from commit be5b271e)
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Otherwise, the compiler is free to reuse the register containing the input for another call and assume that the value hasn't been modified. Fixes crashes on texture upload/download with current gcc. We now have to have a temporary for the cpu2 value, since outputs must be lvalues. (commit message by anholt) Fixes: 4d300242 ("vc4: Use NEON to speed up utile loads on Pi2.") (cherry picked from commit 300d3ae8) [Emil: apply the patch to vc4_tiling_lt.c instead of v3d_cpu_tiling.h] Signed-off-by:
Emil Velikov <emil.velikov@collabora.com> Conflicts: src/broadcom/common/v3d_cpu_tiling.h Squashed with commit: vc4: Declare the last cpu pointer as being modified in NEON asm. Earlier commit addressed 7 of the 8 instances available. v2: Rebase patch back to master (by anholt) Cc: Carsten Haitzler (Rasterman) <raster@rasterman.com> Cc: Eric Anholt <eric@anholt.net> Fixes: 300d3ae8 ("vc4: Declare the cpu pointers as being modified in NEON asm.") Signed-off-by:
Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit 385843ac) Conflicts: src/broadcom/common/v3d_cpu_tiling.h
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- Jan 29, 2019
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This makes the asm code more intelligible and clarifies the functional change in the next commit. (commit message and commit squashing by anholt) (cherry picked from commiti 522f6884) [Emil: apply the patch to vc4_tiling_lt.c instead of v3d_cpu_tiling.h] Signed-off-by:
Emil Velikov <emil.velikov@collabora.com> Conflicts: src/broadcom/common/v3d_cpu_tiling.h
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This allows us to avoid expensive string compares since we already have a map to the pointers. These compares were taking ~30 seconds for a single shader compile in Godot due to it using 64,000+ uniforms. Fixes: c4cff5f4 ("glsl: add basic support for resource list to shader cache") Reviewed-by:
Tapani Pälli <tapani.palli@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109229 (cherry picked from commit fb78a6cb)
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Fixes: b722b29f ("radv: add support for 16bit input/output") Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 0907ae35)
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From the vulkan spec 3.2 "Instances": "Providing a NULL VkInstanceCreateInfo::pApplicationInfo or providing an apiVersion of 0 is equivalent to providing an apiVersion of VK_MAKE_VERSION(1,0,0)." Fixes: ffa15861 "radv: UseEnumerateInstanceVersion for the default version." Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit d12dc393)
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Fixes regression caused by 42d672fa st/nine: Bind src not dst in nine_context_box_upload Before that patch, for user provided textures, when the texture was destroyed, the safety check for pending uploads, which according to the code "Following condition cannot happen currently", was flushing the queue and thus triggering the upload. After the patch, the texture destruction was delayed after the upload. However the user frees the texture buffer, as it thinks the texture released. Instead of reverting the faulty patch, this patch instead flushes the csmt queue right away after queuing the upload for this type of textures. This is more future-proof, as we may want to bind the surface for other reasons in the future. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Cc: 18.3 <mesa-stable@lists.freedesktop.org> (cherry picked from commit d7433c22)
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ICC tries to be helpful by not erroring when it sees something that it doesn't understand, which is completely the opposite of helpful. Meson 0.49.0 does much better at handling this by really trying to make ICC error, but there are some things in mesa that still get ignored until 0.49.1 v2: - Fix id check, which is 'intel' not 'icc' Cc: 18.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (v1) (cherry picked from commit c1efa240)
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The ++ operator strikes again. Fixes: f92c5bc8 ("anv/device: fix maximum number of images supported") Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 4149d41f)
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Emil Velikov authored
warn The commits refer stale sha, yet don't fix anything in particular. 98984b7c 9f86f1da Signed-off-by:
Emil Velikov <emil.velikov@collabora.com>
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Fixes the following piglit test on my VEGA and matches the behaviour in the tgsi backend. tests/spec/glsl-1.10/execution/samplers/glsl-fs-shadow2D-clamp-z.shader_test Fixes: 625dcbbc ("amd/common: pass address components individually to ac_build_image_intrinsic") Reviewed-by:
Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 5d66f710)
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This mirrors what autotools does in src/gallium/state_trackers/vdpau/Makefile.am and src/gallium/targets/vdpau/Makefile.am: VDPAU_MAJOR = 1 VDPAU_MINOR = 0 libvdpau_gallium_la_LDFLAGS = -version-number $(VDPAU_MAJOR):$(VDPAU_MINOR) Reported-by:
Igor Gnatenko <i.gnatenko.brain@gmail.com> Fixes: 68076b87 "meson: build gallium vdpau state tracker" Signed-off-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Emil Velikov <emil.velikov@collabora.com> Reviewed-by:
Dylan Baker <dylan@pnwbakers.com> (cherry picked from commit 69e94403)
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This is a bit fragile, as the way this "fixes" the check is to move the one that we know is correct before the one that is incorrectly reported as working. In meson 0.49.1 (which isn't out yet) this is fixed that the incorrect check is reported as a failure. Fixes: e0b037d6 ("meson: Build SWR driver") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109129 Acked-by:
Eric Engestrom <eric.engestrom@intel.com> (cherry picked from commit 7cb7f35b)
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There's a typo in one of the #defines that breaks compilation. Fixes: e0b037d6 ("meson: Build SWR driver") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109023 Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> (cherry picked from commit 3ba7ab8d)
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This fixes the drisw paths to use the new shm2 interface, so that we don't trigger the X server overflow checks when the x offset is non-zero. This just hides the versioning in drisw, and either passes the src_x or adds the offset fixup for the fallback path. Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Adam Jackson <ajax@redhat.com> (cherry picked from commit 1f6b92b4)
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v2: pass x,0 in as the offset coords at glx level not earlier Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Adam Jackson <ajax@redhat.com> (cherry picked from commit 00af91ca)
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This adds a new interface to the swrast interface to fix an shm put image bug. The current code adds the x,y src offsets into the offset parameters, however if the x offset is > 0, and the put image copies up to the height of the image, this can trigger an X server validation check to fail and the renderering to get BadMatch. This patch fixes it to pass the x offset coord in as a src x. We cannot pass the Y coordinate due to the horrible code mangling the image w/h vs stride in swrastXPutImage. v2: drop srcx,y from api Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Adam Jackson <ajax@redhat.com> (cherry picked from commit db83a2b4)
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This fixes pipe_surface "leaks". Cc: 18.3 <mesa-stable@lists.freedesktop.org> Acked-by:
Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit c89e8470)
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Normally modifiers take precendence over use flags, as they are more explicit. But if the driver supports modifiers, but the xserver does not, then we should fallback to the old mechanism of allocating a buffer using 'use' flags. Fixes: 069fdd5f Signed-off-by:
Rob Clark <robdclark@gmail.com> Reviewed-by:
Kristian H. Kristensen <hoegsberg@chromium.org> (cherry picked from commit c56fe411)
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This fixes an assertion failure with GL CTS when cts-runner is used. (not a specific test) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108877 Cc: 18.3 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4c4c8bb1)
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This fixes an assertion failure with GL CTS when cts-runner is used. (not a specific test) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108877 Cc: 18.3 <mesa-stable@lists.freedesktop.org> (cherry picked from commit caa2dcd7)
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Before, we were double-counting the component slots when we had a dvec3 or dvec4. Instead, just add them in once and manually offset the recorded output offset. Fixes: 19064b8c "nir: Add a pass for gathering transform feedback info" Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Alejandro Piñeiro <apinheiro@igalia.com> (cherry picked from commit 4f99ac91)
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Issue was hit with this configuration: --disable-{egl,gbm} --with-platform=drm Signed-off-by:
Eric Engestrom <eric.engestrom@intel.com> Fixes: 3208fd2e ("configure: move platform handling further up") Reviewed-by:
Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit 610f956f)
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Cc: mesa-stable@lists.freedesktop.org Reviewed-by:
Tapani Pälli <tapani.palli@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Iago Toral Quiroga <itoral@igalia.com> (cherry picked from commit c7f4a286)
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fixes a couple of deqp tests (on nvc0 and potential other drivers): dEQP-GLES3.functional.shaders.invariance.highp.common_subexpression_1 dEQP-GLES3.functional.shaders.invariance.highp.common_subexpression_2 dEQP-GLES3.functional.shaders.invariance.highp.common_subexpression_3 dEQP-GLES3.functional.shaders.invariance.mediump.common_subexpression_1 dEQP-GLES3.functional.shaders.invariance.mediump.common_subexpression_2 dEQP-GLES3.functional.shaders.invariance.mediump.common_subexpression_3 dEQP-GLES3.functional.shaders.invariance.lowp.common_subexpression_1 dEQP-GLES3.functional.shaders.invariance.lowp.common_subexpression_2 dEQP-GLES3.functional.shaders.invariance.lowp.common_subexpression_3 CC: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 987744be)
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This builds on the recent interpolate fix by Rhys ee8488ea. This fixes the arb_gpu_shader5 interpolateAt* tests that contain arrays. Fixes: ee8488ea ("ac/nir,radv,radeonsi/nir: use correct indices for interpolation intrinsics") Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 9e669ed2)
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fixes dEQP-GLES2.functional.shaders.invariance.mediump.loop_3 CC: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 30b5c9ed)
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Otherwise writes get propagated across atomics if no barrier is used. Without barrier writes should still be visible in the same invocation, so an atomic has to be considered a write. CC: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Fixes: b3c61469 "nir: Copy propagation between blocks" Fixes: 62332d13 "nir: Add a local variable-based copy propagation pass" (cherry picked from commit 8424cd8f)
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We had defined MAX_IMAGES as 8, which we used to size the array for image push constant data. The comment there stated that this was for gen8, but anv_nir_apply_pipeline_layout runs for all gens and writes that array, asserting that we don't exceed that number of images, which imposes a limit of MAX_IMAGES on all gens. Furthermore, despite this, we are exposing up to 64 images per shader stage on all gens, gen8 included. This patch lowers the number of images we expose in gen8 to 8 and keeps 64 images for gen9+ while making sure that only pre-SKL gens use push constant space to handle images. v2: - <= instead of < in the assert (Eric, Lionel) - Change the way the assertion is written (Eric) v3: - Revert the way the assertion is written to the form it had in v1, the version in v2 was not equivalent and was incorrect. (Lionel) v4: - gen9+ doesn't need push constants for images at all (Jason) Cc: mesa-stable@lists.freedesktop.org Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v3) (cherry picked from commit f92c5bc8)
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Instead of taking a whole pipeline (which could be anything!), just take a physical device and robust_buffer_access boolean. This makes it easier to verify that only the things in the hash actually affect pipeline compilation. Reviewed-by:
Iago Toral Quiroga <itoral@igalia.com> (cherry picked from commit a24654b4)
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Noticed while debugging V3D -- the ro->gpu_fd was freshly opened in ro setup, and it needs to stay open until screen close (since it may be used by renderonly) and should be the same one used by the vc4 screen. Fixes: 7029ec05 ("gallium: Add renderonly-based support for pl111+vc4.") (cherry picked from commit 99ef66c3)
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This was already enabled for gallium based osmesa with gallium drivers in 9d105818, so do the same for classic driver with classic osmesa. Fixes: cbbd5bb8 ("meson: build classic osmesa") Reviewed-by:
Jordan Justen <jordan.l.justen@intel.com> (cherry picked from commit 431e9aba)
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Various recreation scenarios lead to API thread getting stuck in swr_fence_finish(). This is a multi-context issue, whereby one context overwrites the fence read-value with a previous sync's lesser value. The fence sync value is supposed to be always increasing. In swr_fence_cb(), only update the "read" value if the new value is greater. (This may seem like we're not waiting on the other context to finish, but had we needed for it to finish there would have been a wait prior to submitting a new sync.) cc: mesa-stable@lists.freedesktop.org (cherry picked from commit ed7673af)
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`with_gallium_icd` is never used throughout the different Meson build files, whereas `with_opencl_icd` tracks whether or not `gallium-opencl` was set to "icd". Fixes: 42ea0631 ("meson: build clover") Signed-off-by:
Pierre Moreau <pierre.morrow@free.fr> Reviewed-by:
Dylan Baker <dylan@pnwbakers.com> (cherry picked from commit 0b736f7f)
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Looking at -pro we need to enable it for pipelines with just a GS too. This seems to reduce the hangs from https://bugs.freedesktop.org/show_bug.cgi?id=109242 on a RX 550 to the point where I can't reproduce, after the false start with the wd_switch_on_eop patch due to flakiness. (but people are reporting it does not fix the issue completely for them on polaris 11) CC: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit 568e7a29)
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