x86: try fixing AVX detection again by adding check for XSAVE

Maybe update the comments in the code around that so they explain actual reality and what's happening there :)

changed the description

Still doesn't work.

[shellcode@laptop ~/dev/orc] [fix-avx] $ builddir/tools/orc-bugreport
Orc 0.4.39.1 - integrated testing tool
Active backend: avx
L1 cache: 32768
L2 cache: 262144
L3 cache: 3145728
Family/Model/Stepping: 6/78/3
CPU name: Intel(R) Core(TM) i5-6200U CPU @ 2.30GHz
Compiler options: sse2 sse3 ssse3 sse41 sse42 64bit avx avx2
Opcode test:
zsh: illegal hardware instruction (core dumped)  builddir/tools/orc-bugreport

It's clearly reporting XSAVE and OSXSAVE as enabled, so Linux must be reporting the mitigation somewhere else.

I don't know if this is helpful or not but 3 months ago you asked me to test !184 (merged) and it worked fine, this regression is most likely due to 64453c43 or e184d18f.

added 1 commit

cebb85f5 - x86: try fixing AVX detection again by adding check for XSAVE

Compare with previous version

added 1 commit

87783aca - x86: try fixing AVX detection again by adding check for XSAVE

Compare with previous version

resolved all threads

@ShellCode33 Most likely e184d18f -- the smallprint of the mitigation says that only XSAVE YMM is disabled in xgetbv(0), so this equality's wrong for the intrinsics-version of the AVX check.

@ShellCode33 Mind testing again with the fixed check?

Works like a charm! Good job!

$ ./builddir/tools/orc-bugreport
Orc 0.4.39.1 - integrated testing tool
Active backend: sse
L1 cache: 32768
L2 cache: 262144
L3 cache: 3145728
Family/Model/Stepping: 6/78/3
CPU name: Intel(R) Core(TM) i5-6200U CPU @ 2.30GHz
Compiler options: sse2 sse3 ssse3 sse41 sse42 64bit
Opcode test:
No errors detected.